Re: [PATCH v4 1/2] xen/PVH: Set up GS segment for stack canary

[Brian Gerst]

On Mon, May 21, 2018 at 11:54 PM, Boris Ostrovsky
<boris.ostrovsky@xxxxxxxxxx> wrote:
> We are making calls to C code (e.g. xen_prepare_pvh()) which may use
> stack canary (stored in GS segment).
>
> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
> ---
>  arch/x86/xen/xen-pvh.S | 26 +++++++++++++++++++++++++-
>  1 file changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/xen/xen-pvh.S b/arch/x86/xen/xen-pvh.S
> index e1a5fbe..0169374 100644
> --- a/arch/x86/xen/xen-pvh.S
> +++ b/arch/x86/xen/xen-pvh.S
> @@ -54,6 +54,9 @@
>   * charge of setting up it's own stack, GDT and IDT.
>   */
>
> +#define PVH_GDT_ENTRY_CANARY   4
> +#define PVH_CANARY_SEL         (PVH_GDT_ENTRY_CANARY * 8)
> +
>  ENTRY(pvh_start_xen)
>         cld
>
> @@ -98,6 +101,12 @@ ENTRY(pvh_start_xen)
>         /* 64-bit entry point. */
>         .code64
>  1:
> +       /* Set base address in stack canary descriptor. */
> +       mov $MSR_GS_BASE,%ecx
> +       mov $canary, %rax
> +       cdq
> +       wrmsr

CDQ only sign-extends EAX to RAX.  What you really want is to move the
high 32-bits to EDX (or zero EDX if we can guarantee it is loaded
below 4G).

--
Brian Gerst