On Wed, May 30, 2018 at 1:24 AM, Eddie James <eajames@xxxxxxxxxxxxxxxxxx> wrote:
From: "Edward A. James" <eajames@xxxxxxxxxx>I think we have a helper for this, though not sure.
Execute I2C transfers from the FSI-attached I2C master. Use polling
instead of interrupts as we have no hardware IRQ over FSI.
+ if (msg->flags & I2C_M_RD)
+ cmd |= I2C_CMD_READ;
+static int fsi_i2c_write_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg,Redundant assignment.
+ u8 fifo_count)
+{
+ int write;
+ int rc = 0;
+ struct fsi_i2c_master *i2c = port->master;_write = min(_write, _remaining);
+ int bytes_to_write = i2c->fifo_size - fifo_count;
+ int bytes_remaining = msg->len - port->xfrd;
+ if (bytes_to_write > bytes_remaining)
+ bytes_to_write = bytes_remaining;
+ while (bytes_to_write > 0) {write = min_t(int, 4, rounddown_pow_of_two(bytes_to_write));
+ write = bytes_to_write;
+ /* fsi limited to max 4 byte aligned ops */
+ if (bytes_to_write > 4)
+ write = 4;
+ else if (write == 3)
+ write = 2;
Also check it carefully, it might be optimized even more, though I
didn't think much.