Re: [PATCH] PCI: Check for PCIe downtraining conditions

[Alex_Gagniuc]

On 5/31/2018 10:28 AM, Sinan Kaya wrote:
> On 5/31/2018 11:05 AM, Alexandru Gagniuc wrote:
>> +static void pcie_max_link_cap(struct pci_dev *dev, enum pci_bus_speed *speed,
>> +				enum pcie_link_width *width)
>> +{
>> +	uint32_t lnkcap;
>> +
>> +	pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
>> +
>> +	*speed = pcie_link_speed[lnkcap & PCI_EXP_LNKCAP_SLS];
>> +	*width = (lnkcap & PCI_EXP_LNKCAP_MLW) >> PCI_EXP_LNKCAP_MLW_SHIFT;
>> +}
>> +
>> +static void pcie_cur_link_sta(struct pci_dev *dev, enum pci_bus_speed *speed,
>> +				enum pcie_link_width *width)
>> +{
>> +	uint16_t lnksta;
>> +
>> +	pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
>> +	*speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS];
>> +	*width = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
>> +}
>> +
>> +static const char *pcie_bus_speed_name(enum pci_bus_speed speed)
>> +{
>> +	switch (speed) {
>> +	case PCIE_SPEED_2_5GT:
>> +		return "2.5 GT/s";
>> +	case PCIE_SPEED_5_0GT:
>> +		return "5.0 GT/s";
>> +	case PCIE_SPEED_8_0GT:
>> +		return "8.0 GT/s";
>> +	default:
>> +		return "unknown";
>> +	}
>> +}
> 
> I thought Bjorn added some functions to retrieve this now.

Hmm. I couldn't find them.

Alex