Re: [PATCH] PCI: Check for PCIe downtraining conditions

[Alex G.]

On 05/31/2018 11:49 AM, Alex G. wrote:
> 
> 
> On 05/31/2018 11:13 AM, Sinan Kaya wrote:
>> On 5/31/2018 12:01 PM, Alex G. wrote:
>>>>       PCI: Add pcie_print_link_status() to log link speed and whether it's limited
>>> This one, I have, but it's not what I need. This looks at the available
>>> bandwidth from root port to endpoint, whereas I'm only interested in
>>> downtraining between endpoint and upstream port.
>>
>> I see what you are saying. 
>>
>> With a little bit of effort, you can reuse the same code.
>>
>> Here is an attempt.
>>
>> You can probably extend pcie_bandwidth_available() to put an optional parent bridge
>> device for your own use case and terminate the loop around here.
>>
>> https://elixir.bootlin.com/linux/v4.17-rc7/source/drivers/pci/pci.c#L5182
>>
>> Then, you can use the existing code to achieve what you are looking for via
>> pcie_print_link_status() by adding an optional parent parameter.
>>
>> 	bw_cap = pcie_bandwidth_capable(dev, &speed_cap, &width_cap);
>> 	bw_avail = pcie_bandwidth_available(dev, &limiting_dev, &speed, &width, *parent*);
> 
> That's confusing.

"confusing" refers to the way the code currently works. It doesn't refer
to your proposal.


Alex

 I'd expect _capable() and _available() to be
> symmetrical. They either both look at one link only, or both go down to
> the root port. Though it seems _capable() is link-local, and
> _available() is down to root port.
> 
>>
>> If parent parameter is NULL, code can walk all the way to root as it is doing today.
>> If it is not, then will terminate the loop on the first iteration.
>>