RE: [PATCH v7 10/10] drivers: clk: Add ZynqMP clock driver

[Jolly Shah]

Hi Randy,

Thanks for review,

> -----Original Message-----
> From: Randy Dunlap [mailto:rdunlap@xxxxxxxxxxxxx]
> Sent: Wednesday, May 30, 2018 2:18 PM
> To: Jolly Shah <JOLLYS@xxxxxxxxxx>; ard.biesheuvel@xxxxxxxxxx;
> mingo@xxxxxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx; matt@xxxxxxxxxxxxxxxxxxx;
> sudeep.holla@xxxxxxx; hkallweit1@xxxxxxxxx; keescook@xxxxxxxxxxxx;
> dmitry.torokhov@xxxxxxxxx; mturquette@xxxxxxxxxxxx;
> sboyd@xxxxxxxxxxxxxx; michal.simek@xxxxxxxxxx; robh+dt@xxxxxxxxxx;
> mark.rutland@xxxxxxx; linux-clk@xxxxxxxxxxxxxxx
> Cc: Rajan Vaja <RAJANV@xxxxxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; Tejas Patel
> <TEJASP@xxxxxxxxxx>; Shubhrajyoti Datta <shubhraj@xxxxxxxxxx>; Jolly Shah
> <JOLLYS@xxxxxxxxxx>
> Subject: Re: [PATCH v7 10/10] drivers: clk: Add ZynqMP clock driver
> 
> On 05/30/2018 01:55 PM, Jolly Shah wrote:
> > From: Jolly Shah <jolly.shah@xxxxxxxxxx>
> 
> 
> > diff --git a/drivers/clk/zynqmp/Kconfig b/drivers/clk/zynqmp/Kconfig
> > new file mode 100644 index 0000000..fe815f7
> > --- /dev/null
> > +++ b/drivers/clk/zynqmp/Kconfig
> > @@ -0,0 +1,11 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +
> > +config COMMON_CLK_ZYNQMP
> > +	bool "Support for Xilinx ZynqMP Ultrascale+ clock controllers"
> > +	depends on OF
> > +	depends on ARCH_ZYNQMP || COMPILE_TEST
> > +	depends on ZYNQMP_FIRMWARE
> > +	help
> > +	  Support for the Zynqmp Ultrascale clock controller.
> > +	  It has a dependency on the PMU firmware.
> > +	  Say Y if you want to support clock support
> 
> 	  Say Y if you want to include clock support.
> 
	Fixed in v8

> 
> --
> ~Randy