Re: [PATCH 3/3] x86/kvm: Handle all MCA banks

[Borislav Petkov]

On Fri, Jun 22, 2018 at 08:16:04PM +0200, Radim KrÄmÃÅ wrote:
> 2018-06-22 11:51+0200, Borislav Petkov:
> > From: Borislav Petkov <bp@xxxxxxx>
> > 
> > Extend the range of MCA banks which get passed to set/get_msr_mce() to
> > include all the MSRs of the last bank too.
> > 
> > Signed-off-by: Borislav Petkov <bp@xxxxxxx>
> > ---
> >  arch/x86/kvm/x86.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> > index 80452b0f0e8c..a7d344823356 100644
> > --- a/arch/x86/kvm/x86.c
> > +++ b/arch/x86/kvm/x86.c
> > @@ -2466,7 +2466,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> >  
> >  	case MSR_IA32_MCG_CTL:
> >  	case MSR_IA32_MCG_STATUS:
> > -	case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
> > +	case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_MISC(KVM_MAX_MCE_BANKS) - 1:
> 
> It was correct before.  We have 32 banks (KVM_MAX_MCE_BANKS), so the
> last useable has index 31 and the "- 1" is going to roll over from first
> MSR of bank 32 to the last MSR of the last bank.
> 
> Another way of writing it would be:
> 
>  case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_MISC(KVM_MAX_MCE_BANKS - 1):

Huh?

This is what I did:

+   case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_MISC(KVM_MAX_MCE_BANKS) - 1:

It needs to be MISC because it is the last MSR in the MCA bank and thus
the highest.

-- 
Regards/Gruss,
    Boris.

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