BMC firmware should support some multi-master use cases such as multi-node,This does many unrelated looking changes in one patch making it more vulnerable for potential multiple regressions. For instance busy checking goes from single read to loop with 250 ms timeout in this patch while changing also spin lock logic and interrupt handling.
IPMB, BMC-ME link and so on but the current ASPEED I2C driver is a bit
unstable for the multi-master use case. So this patch improves ASPEED I2C
driver to support the multi-master use case stably.
Changes:
* Added XFER_MODE status register checking logic into
aspeed_i2c_master_xfer to improve the current bus busy checking logic.
* Changed the order of enum aspeed_i2c_master_state and
enum aspeed_i2c_slave_state defines to make their initial values set to
ASPEED_I2C_MASTER_INACTIVE and ASPEED_I2C_SLAVE_STOP respectively.
In case of multi-master use with previous code, if a slave data comes
ahead of the first master xfer, master_state starts from an invalid
state. This change fixed the issue.
* Adjusted spin_lock scope to make it wrap the whole irq handler using
a single lock and unlock pair covers both master and slave handlers.
* Added irq_status variable as a member of the struct aspeed_i2c_bus to
collect handled interrupt bits throughout the master and the slave irq
handlers.
* Added control logic to put an order on calling the master and the slave
irq handlers based on their current states.