[PATCH v1 0/6] x86/tsc: Clean up legacy code for Intel MID

[Andy Shevchenko]

As Thomas noticed there is unusual initialization is going on on Intel MID
platforms when TSC is being calibrated.

It appears that we have tsc_msr.c to support Intel MID in a more generic way.

So, this patch series removes legacy calibration code and does accompanying
clean ups.

Has been tested on Intel Medfield and Intel Merrifield platforms.

Andy Shevchenko (6):
  x86/cpu: Introduce INTEL_CPU_FAM*() helper macros
  x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()
  x86/tsc: Add missed header to tsc_msr.c
  x86/tsc: Use SPDX identifier and update Intel copyright
  x86/platform/intel-mid: Remove custom TSC calibration
  x86/platform/intel-mid: Remove per platform code

 arch/x86/include/asm/intel-family.h           |  13 +++
 arch/x86/include/asm/intel-mid.h              |  43 -------
 arch/x86/kernel/tsc_msr.c                     |  96 ++++++++--------
 arch/x86/platform/intel-mid/Makefile          |   2 +-
 arch/x86/platform/intel-mid/intel-mid.c       |  23 +---
 .../platform/intel-mid/intel_mid_weak_decls.h |  18 ---
 arch/x86/platform/intel-mid/mfld.c            |  70 ------------
 arch/x86/platform/intel-mid/mrfld.c           | 105 ------------------
 8 files changed, 66 insertions(+), 304 deletions(-)
 delete mode 100644 arch/x86/platform/intel-mid/intel_mid_weak_decls.h
 delete mode 100644 arch/x86/platform/intel-mid/mfld.c
 delete mode 100644 arch/x86/platform/intel-mid/mrfld.c

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2.18.0