Re: [PATCH v12 03/13] x86/sgx: add SGX definitions to msr-index.h

[Thomas Gleixner]

On Tue, 3 Jul 2018, Jarkko Sakkinen wrote:

x86/msr: Add ....

> From: Sean Christopherson <sean.j.christopherson@xxxxxxxxx>
> 
> ENCLS and ENCLU are usable if and only if SGX_ENABLE is set and After
> SGX is activated the IA32_SGXLEPUBKEYHASHn MSRs are writable if
> SGX_LC_WR is set and the feature control is locked.
> 
> SGX related bits in IA32_FEATURE_CONTROL cannot be set before SGX is
> activated by the pre-boot firmware. SGX activation is triggered by
> setting bit 0 in the MSR 0x7a. Until SGX is activated, the LE hash MSRs
> are writable to allow pre-boot firmware to lock down the LE root key
> with a non-Intel value.
> 
> Signed-off-by: Sean Christopherson <sean.j.christopherson@xxxxxxxxx>
> Co-developed-by: Haim Cohen <haim.cohen@xxxxxxxxx>

Lacks SOB

> ---
>  arch/x86/include/asm/msr-index.h | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index fda2114197b3..a7355fb7344f 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -479,6 +479,8 @@
>  #define FEATURE_CONTROL_LOCKED				(1<<0)
>  #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX	(1<<1)
>  #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX	(1<<2)
> +#define FEATURE_CONTROL_SGX_ENABLE                      (1<<18)

Tabs not spaces please. checkpatch.pl would have told you

> +#define FEATURE_CONTROL_SGX_LE_WR			(1<<17)

Thanks,

	tglx