[PATCH 4/8] clk: tegra: fix MUX_I2S_SPDIF macro
From: Ben Dooks
Date: Fri Jul 20 2018 - 09:45:41 EST
From: Thomas Preston <thomas.preston@xxxxxxxxxxxxxxx>
The i2s clock mux should take audio_2x as a parent, but the
current macro misses the _2x suffix off the audio input clock
which means the audio_2x cannot be selected as a parent of i2s.
Fix the issue by appending the _2x prefix in the name array.
Signed-off-by: Thomas Preston <thomas.preston@xxxxxxxxxxxxxxx>
---
drivers/clk/tegra/clk-tegra-periph.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index ed70419f4ff9..47e5b1ac1a69 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -280,7 +280,7 @@ static DEFINE_SPINLOCK(sor0_lock);
#define MUX_I2S_SPDIF(_id) \
static const char *mux_pllaout0_##_id##_2x_pllp_clkm[] = { "pll_a_out0", \
- #_id, "pll_p",\
+ #_id"_2x", "pll_p",\
"clk_m"};
MUX_I2S_SPDIF(audio0)
MUX_I2S_SPDIF(audio1)
--
2.18.0