Re: [PATCH i2c-next] i2c: aspeed: Handle master/slave combined irq events properly

From: Jae Hyun Yoo
Date: Mon Jul 23 2018 - 14:13:44 EST


Thanks James for the review. Please see my inline answers.

On 7/23/2018 11:10 AM, James Feist wrote:
On 07/23/2018 10:48 AM, Jae Hyun Yoo wrote:
In most of cases, interrupt bits are set one by one but there are
also a lot of other cases that Aspeed I2C IP sends multiple
interrupt bits with combining master and slave events using a
single interrupt call. It happens much in multi-master environment

much more


Thanks! Will fix it.

than single-master. For an example, when master is waiting for a
NORMAL_STOP interrupt in its MASTER_STOP state, SLAVE_MATCH and
RX_DONE interrupts could come along with the NORMAL_STOP in case of
an another master immediately sends data just after acquiring the
bus. In this case, the NORMAL_STOP interrupt should be handled
by master_irq and the SLAVE_MATCH and RX_DONE interrupts should be
handled by slave_irq. This commit modifies irq hadling logic to
handle the master/slave combined events properly.

Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@xxxxxxxxxxxxxxx>
---
 drivers/i2c/busses/i2c-aspeed.c | 137 ++++++++++++++++++--------------
 1 file changed, 76 insertions(+), 61 deletions(-)

diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c
index efb89422d496..24d43f143a55 100644
--- a/drivers/i2c/busses/i2c-aspeed.c
+++ b/drivers/i2c/busses/i2c-aspeed.c
@@ -82,6 +82,11 @@
 #define ASPEED_I2CD_INTR_RX_DONE BIT(2)
 #define ASPEED_I2CD_INTR_TX_NAK BIT(1)
 #define ASPEED_I2CD_INTR_TX_ACK BIT(0)
+#define ASPEED_I2CD_INTR_ERRORSÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
+ÂÂÂÂÂÂÂ (ASPEED_I2CD_INTR_SDA_DL_TIMEOUT |ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
+ÂÂÂÂÂÂÂÂ ASPEED_I2CD_INTR_SCL_TIMEOUT |ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
+ÂÂÂÂÂÂÂÂ ASPEED_I2CD_INTR_ABNORMAL |ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
+ÂÂÂÂÂÂÂÂ ASPEED_I2CD_INTR_ARBIT_LOSS)
 #define ASPEED_I2CD_INTR_ALL \
ÂÂÂÂÂÂÂÂÂ (ASPEED_I2CD_INTR_SDA_DL_TIMEOUT |ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
ÂÂÂÂÂÂÂÂÂÂ ASPEED_I2CD_INTR_BUS_RECOVER_DONE |ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ \
@@ -150,6 +155,7 @@ struct aspeed_i2c_bus {
ÂÂÂÂÂ intÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ cmd_err;
ÂÂÂÂÂ /* Protected only by i2c_lock_bus */
ÂÂÂÂÂ intÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ master_xfer_result;
+ÂÂÂ u32ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ irq_status;
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
ÂÂÂÂÂ struct i2c_clientÂÂÂÂÂÂÂ *slave;
ÂÂÂÂÂ enum aspeed_i2c_slave_stateÂÂÂ slave_state;
@@ -229,36 +235,30 @@ static int aspeed_i2c_recover_bus(struct aspeed_i2c_bus *bus)
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
 static bool aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus)
 {
-ÂÂÂ u32 command, irq_status, status_ack = 0;
+ÂÂÂ u32 command, status_ack = 0;
ÂÂÂÂÂ struct i2c_client *slave = bus->slave;
-ÂÂÂ bool irq_handled = true;
ÂÂÂÂÂ u8 value;
-ÂÂÂ if (!slave) {
-ÂÂÂÂÂÂÂ irq_handled = false;
-ÂÂÂÂÂÂÂ goto out;
-ÂÂÂ }
+ÂÂÂ if (!slave)
+ÂÂÂÂÂÂÂ return false;
ÂÂÂÂÂ command = readl(bus->base + ASPEED_I2C_CMD_REG);
-ÂÂÂ irq_status = readl(bus->base + ASPEED_I2C_INTR_STS_REG);
ÂÂÂÂÂ /* Slave was requested, restart state machine. */
-ÂÂÂ if (irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH) {
+ÂÂÂ if (bus->irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH) {
ÂÂÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_SLAVE_MATCH;
ÂÂÂÂÂÂÂÂÂ bus->slave_state = ASPEED_I2C_SLAVE_START;
ÂÂÂÂÂ }
ÂÂÂÂÂ /* Slave is not currently active, irq was for someone else. */
-ÂÂÂ if (bus->slave_state == ASPEED_I2C_SLAVE_STOP) {
-ÂÂÂÂÂÂÂ irq_handled = false;
-ÂÂÂÂÂÂÂ goto out;
-ÂÂÂ }
+ÂÂÂ if (bus->slave_state == ASPEED_I2C_SLAVE_STOP)
+ÂÂÂÂÂÂÂ return false;
ÂÂÂÂÂ dev_dbg(bus->dev, "slave irq status 0x%08x, cmd 0x%08x\n",
-ÂÂÂÂÂÂÂ irq_status, command);
+ÂÂÂÂÂÂÂ bus->irq_status, command);
ÂÂÂÂÂ /* Slave was sent something. */
-ÂÂÂ if (irq_status & ASPEED_I2CD_INTR_RX_DONE) {
+ÂÂÂ if (bus->irq_status & ASPEED_I2CD_INTR_RX_DONE) {
ÂÂÂÂÂÂÂÂÂ value = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
ÂÂÂÂÂÂÂÂÂ /* Handle address frame. */
ÂÂÂÂÂÂÂÂÂ if (bus->slave_state == ASPEED_I2C_SLAVE_START) {
@@ -273,28 +273,29 @@ static bool aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂ }
ÂÂÂÂÂ /* Slave was asked to stop. */
-ÂÂÂ if (irq_status & ASPEED_I2CD_INTR_NORMAL_STOP) {
+ÂÂÂ if (bus->irq_status & ASPEED_I2CD_INTR_NORMAL_STOP) {
ÂÂÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_NORMAL_STOP;
ÂÂÂÂÂÂÂÂÂ bus->slave_state = ASPEED_I2C_SLAVE_STOP;
ÂÂÂÂÂ }
-ÂÂÂ if (irq_status & ASPEED_I2CD_INTR_TX_NAK) {
+ÂÂÂ if (bus->irq_status & ASPEED_I2CD_INTR_TX_NAK) {
ÂÂÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_TX_NAK;
ÂÂÂÂÂÂÂÂÂ bus->slave_state = ASPEED_I2C_SLAVE_STOP;
ÂÂÂÂÂ }
+ÂÂÂ if (bus->irq_status & ASPEED_I2CD_INTR_TX_ACK) {
+ÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_TX_ACK;
+ÂÂÂ }
ÂÂÂÂÂ switch (bus->slave_state) {
ÂÂÂÂÂ case ASPEED_I2C_SLAVE_READ_REQUESTED:
-ÂÂÂÂÂÂÂ if (irq_status & ASPEED_I2CD_INTR_TX_ACK)
+ÂÂÂÂÂÂÂ if (bus->irq_status & ASPEED_I2CD_INTR_TX_ACK)
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(bus->dev, "Unexpected ACK on read request.\n");
ÂÂÂÂÂÂÂÂÂ bus->slave_state = ASPEED_I2C_SLAVE_READ_PROCESSED;
-
ÂÂÂÂÂÂÂÂÂ i2c_slave_event(slave, I2C_SLAVE_READ_REQUESTED, &value);
ÂÂÂÂÂÂÂÂÂ writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
ÂÂÂÂÂÂÂÂÂ writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG);
ÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂ case ASPEED_I2C_SLAVE_READ_PROCESSED:
-ÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_TX_ACK;
-ÂÂÂÂÂÂÂ if (!(irq_status & ASPEED_I2CD_INTR_TX_ACK))
+ÂÂÂÂÂÂÂ if (!(bus->irq_status & ASPEED_I2CD_INTR_TX_ACK))
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(bus->dev,
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ "Expected ACK after processed read.\n");
ÂÂÂÂÂÂÂÂÂ i2c_slave_event(slave, I2C_SLAVE_READ_PROCESSED, &value);
@@ -317,14 +318,8 @@ static bool aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂ }
-ÂÂÂ if (status_ack != irq_status)
-ÂÂÂÂÂÂÂ dev_err(bus->dev,
-ÂÂÂÂÂÂÂÂÂÂÂ "irq handled != irq. expected %x, but was %x\n",
-ÂÂÂÂÂÂÂÂÂÂÂ irq_status, status_ack);
-ÂÂÂ writel(status_ack, bus->base + ASPEED_I2C_INTR_STS_REG);
-
-out:
-ÂÂÂ return irq_handled;
+ÂÂÂ bus->irq_status ^= status_ack;
+ÂÂÂ return !bus->irq_status;
 }
 #endif /* CONFIG_I2C_SLAVE */
@@ -382,19 +377,19 @@ static int aspeed_i2c_is_irq_error(u32 irq_status)
 static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
 {
-ÂÂÂ u32 irq_status, status_ack = 0, command = 0;
+ÂÂÂ u32 status_ack = 0, command = 0;
ÂÂÂÂÂ struct i2c_msg *msg;
ÂÂÂÂÂ u8 recv_byte;
ÂÂÂÂÂ int ret;
-ÂÂÂ irq_status = readl(bus->base + ASPEED_I2C_INTR_STS_REG);
-ÂÂÂ /* Ack all interrupt bits. */
-ÂÂÂ writel(irq_status, bus->base + ASPEED_I2C_INTR_STS_REG);
-
-ÂÂÂ if (irq_status & ASPEED_I2CD_INTR_BUS_RECOVER_DONE) {
+ÂÂÂ if (bus->irq_status & ASPEED_I2CD_INTR_BUS_RECOVER_DONE) {
ÂÂÂÂÂÂÂÂÂ bus->master_state = ASPEED_I2C_MASTER_INACTIVE;
ÂÂÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_BUS_RECOVER_DONE;
ÂÂÂÂÂÂÂÂÂ goto out_complete;
+ÂÂÂ } else {
+ÂÂÂÂÂÂÂ /* Master is not currently active, irq was for someone else. */
+ÂÂÂÂÂÂÂ if (bus->master_state == ASPEED_I2C_MASTER_INACTIVE)
+ÂÂÂÂÂÂÂÂÂÂÂ goto out_no_complete;
ÂÂÂÂÂ }
ÂÂÂÂÂ /*
@@ -402,20 +397,23 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂÂ * should clear the command queue effectively taking us back to the
ÂÂÂÂÂÂ * INACTIVE state.
ÂÂÂÂÂÂ */
-ÂÂÂ ret = aspeed_i2c_is_irq_error(irq_status);
-ÂÂÂ if (ret < 0) {
+ÂÂÂ ret = aspeed_i2c_is_irq_error(bus->irq_status);
+ÂÂÂ if (ret) {
ÂÂÂÂÂÂÂÂÂ dev_dbg(bus->dev, "received error interrupt: 0x%08x\n",
-ÂÂÂÂÂÂÂÂÂÂÂ irq_status);
+ÂÂÂÂÂÂÂÂÂÂÂ bus->irq_status);
ÂÂÂÂÂÂÂÂÂ bus->cmd_err = ret;
ÂÂÂÂÂÂÂÂÂ bus->master_state = ASPEED_I2C_MASTER_INACTIVE;
+ÂÂÂÂÂÂÂ status_ack |= (bus->irq_status & ASPEED_I2CD_INTR_ERRORS);
ÂÂÂÂÂÂÂÂÂ goto out_complete;
ÂÂÂÂÂ }
ÂÂÂÂÂ /* We are in an invalid state; reset bus to a known state. */
ÂÂÂÂÂ if (!bus->msgs) {
-ÂÂÂÂÂÂÂ dev_err(bus->dev, "bus in unknown state\n");
+ÂÂÂÂÂÂÂ dev_err(bus->dev, "bus in unknown state irq_status: 0x%x\n",
+ÂÂÂÂÂÂÂÂÂÂÂ bus->irq_status);
ÂÂÂÂÂÂÂÂÂ bus->cmd_err = -EIO;
-ÂÂÂÂÂÂÂ if (bus->master_state != ASPEED_I2C_MASTER_STOP)
+ÂÂÂÂÂÂÂ if (bus->master_state != ASPEED_I2C_MASTER_STOP &&
+ÂÂÂÂÂÂÂÂÂÂÂ bus->master_state != ASPEED_I2C_MASTER_INACTIVE)
ÂÂÂÂÂÂÂÂÂÂÂÂÂ aspeed_i2c_do_stop(bus);
ÂÂÂÂÂÂÂÂÂ goto out_no_complete;
ÂÂÂÂÂ }
@@ -427,8 +425,14 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂÂ * then update the state and handle the new state below.
ÂÂÂÂÂÂ */
ÂÂÂÂÂ if (bus->master_state == ASPEED_I2C_MASTER_START) {
-ÂÂÂÂÂÂÂ if (unlikely(!(irq_status & ASPEED_I2CD_INTR_TX_ACK))) {
-ÂÂÂÂÂÂÂÂÂÂÂ pr_devel("no slave present at %02x\n", msg->addr);
+ÂÂÂÂÂÂÂ if (unlikely(!(bus->irq_status & ASPEED_I2CD_INTR_TX_ACK))) {
+ÂÂÂÂÂÂÂÂÂÂÂ if (unlikely(!(bus->irq_status &
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ ASPEED_I2CD_INTR_TX_NAK))) {
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ bus->cmd_err = -ENXIO;
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ bus->master_state = ASPEED_I2C_MASTER_INACTIVE;
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ goto out_complete;
+ÂÂÂÂÂÂÂÂÂÂÂ }
+ÂÂÂÂÂÂÂÂÂÂÂ pr_devel("no slave present at %02x", msg->addr);
Missing line feed character

Thanks for your pointing it out. Will add '\n' at the end of the
message.

ÂÂÂÂÂÂÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_TX_NAK;
ÂÂÂÂÂÂÂÂÂÂÂÂÂ bus->cmd_err = -ENXIO;
ÂÂÂÂÂÂÂÂÂÂÂÂÂ aspeed_i2c_do_stop(bus);
@@ -447,11 +451,12 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂ switch (bus->master_state) {
ÂÂÂÂÂ case ASPEED_I2C_MASTER_TX:
-ÂÂÂÂÂÂÂ if (unlikely(irq_status & ASPEED_I2CD_INTR_TX_NAK)) {
+ÂÂÂÂÂÂÂ if (unlikely(bus->irq_status & ASPEED_I2CD_INTR_TX_NAK)) {
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_dbg(bus->dev, "slave NACKed TX\n");
ÂÂÂÂÂÂÂÂÂÂÂÂÂ status_ack |= ASPEED_I2CD_INTR_TX_NAK;
ÂÂÂÂÂÂÂÂÂÂÂÂÂ goto error_and_stop;
-ÂÂÂÂÂÂÂ } else if (unlikely(!(irq_status & ASPEED_I2CD_INTR_TX_ACK))) {
+ÂÂÂÂÂÂÂ } else if (unlikely(!(bus->irq_status &
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ ASPEED_I2CD_INTR_TX_ACK))) {
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(bus->dev, "slave failed to ACK TX\n");
ÂÂÂÂÂÂÂÂÂÂÂÂÂ goto error_and_stop;
ÂÂÂÂÂÂÂÂÂ }
@@ -470,11 +475,11 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂÂÂÂÂ goto out_no_complete;
ÂÂÂÂÂ case ASPEED_I2C_MASTER_RX_FIRST:
ÂÂÂÂÂÂÂÂÂ /* RX may not have completed yet (only address cycle) */
-ÂÂÂÂÂÂÂ if (!(irq_status & ASPEED_I2CD_INTR_RX_DONE))
+ÂÂÂÂÂÂÂ if (!(bus->irq_status & ASPEED_I2CD_INTR_RX_DONE))
ÂÂÂÂÂÂÂÂÂÂÂÂÂ goto out_no_complete;
ÂÂÂÂÂÂÂÂÂ /* fallthrough intended */
ÂÂÂÂÂ case ASPEED_I2C_MASTER_RX:
-ÂÂÂÂÂÂÂ if (unlikely(!(irq_status & ASPEED_I2CD_INTR_RX_DONE))) {
+ÂÂÂÂÂÂÂ if (unlikely(!(bus->irq_status & ASPEED_I2CD_INTR_RX_DONE))) {
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(bus->dev, "master failed to RX\n");
ÂÂÂÂÂÂÂÂÂÂÂÂÂ goto error_and_stop;
ÂÂÂÂÂÂÂÂÂ }
@@ -505,8 +510,11 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂÂÂÂÂ }
ÂÂÂÂÂÂÂÂÂ goto out_no_complete;
ÂÂÂÂÂ case ASPEED_I2C_MASTER_STOP:
-ÂÂÂÂÂÂÂ if (unlikely(!(irq_status & ASPEED_I2CD_INTR_NORMAL_STOP))) {
-ÂÂÂÂÂÂÂÂÂÂÂ dev_err(bus->dev, "master failed to STOP\n");
+ÂÂÂÂÂÂÂ if (unlikely(!(bus->irq_status &
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ ASPEED_I2CD_INTR_NORMAL_STOP))) {
+ÂÂÂÂÂÂÂÂÂÂÂ dev_err(bus->dev,
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ "master failed to STOP irq_status:0x%x\n",
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ bus->irq_status);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ bus->cmd_err = -EIO;
ÂÂÂÂÂÂÂÂÂÂÂÂÂ /* Do not STOP as we have already tried. */
ÂÂÂÂÂÂÂÂÂ } else {
@@ -518,7 +526,7 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂ case ASPEED_I2C_MASTER_INACTIVE:
ÂÂÂÂÂÂÂÂÂ dev_err(bus->dev,
ÂÂÂÂÂÂÂÂÂÂÂÂÂ "master received interrupt 0x%08x, but is inactive\n",
-ÂÂÂÂÂÂÂÂÂÂÂ irq_status);
+ÂÂÂÂÂÂÂÂÂÂÂ bus->irq_status);
ÂÂÂÂÂÂÂÂÂ bus->cmd_err = -EIO;
ÂÂÂÂÂÂÂÂÂ /* Do not STOP as we should be inactive. */
ÂÂÂÂÂÂÂÂÂ goto out_complete;
@@ -540,33 +548,40 @@ static bool aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus)
ÂÂÂÂÂÂÂÂÂ bus->master_xfer_result = bus->msgs_index + 1;
ÂÂÂÂÂ complete(&bus->cmd_complete);
 out_no_complete:
-ÂÂÂ if (irq_status != status_ack)
-ÂÂÂÂÂÂÂ dev_err(bus->dev,
-ÂÂÂÂÂÂÂÂÂÂÂ "irq handled != irq. expected 0x%08x, but was 0x%08x\n",
-ÂÂÂÂÂÂÂÂÂÂÂ irq_status, status_ack);
-ÂÂÂ return !!irq_status;
+ÂÂÂ bus->irq_status ^= status_ack;
+ÂÂÂ return !bus->irq_status;
 }
 static irqreturn_t aspeed_i2c_bus_irq(int irq, void *dev_id)
 {
ÂÂÂÂÂ struct aspeed_i2c_bus *bus = dev_id;
-ÂÂÂ bool ret;
+ÂÂÂ u32 irq_received;
ÂÂÂÂÂ spin_lock(&bus->lock);
+ÂÂÂ irq_received = readl(bus->base + ASPEED_I2C_INTR_STS_REG);
+ÂÂÂ bus->irq_status = irq_received;
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
-ÂÂÂ if (aspeed_i2c_slave_irq(bus)) {
-ÂÂÂÂÂÂÂ dev_dbg(bus->dev, "irq handled by slave.\n");
-ÂÂÂÂÂÂÂ ret = true;
-ÂÂÂÂÂÂÂ goto out;
+ÂÂÂ if (bus->master_state != ASPEED_I2C_MASTER_INACTIVE) {
+ÂÂÂÂÂÂÂ if (!aspeed_i2c_master_irq(bus))
+ÂÂÂÂÂÂÂÂÂÂÂ aspeed_i2c_slave_irq(bus);
+ÂÂÂ } else {
+ÂÂÂÂÂÂÂ if (!aspeed_i2c_slave_irq(bus))
+ÂÂÂÂÂÂÂÂÂÂÂ aspeed_i2c_master_irq(bus);
ÂÂÂÂÂ }
+#else
+ÂÂÂ aspeed_i2c_master_irq(bus);
 #endif /* CONFIG_I2C_SLAVE */
-ÂÂÂ ret = aspeed_i2c_master_irq(bus);
+ÂÂÂ if (bus->irq_status)
+ÂÂÂÂÂÂÂ dev_err(bus->dev,
+ÂÂÂÂÂÂÂÂÂÂÂ "irq handled != irq. expected 0x%08x, but was 0x%08x\n",
+ÂÂÂÂÂÂÂÂÂÂÂ irq_received, irq_received ^ bus->irq_status);
-out:
+ÂÂÂ /* Ack all interrupt bits. */
+ÂÂÂ writel(irq_received, bus->base + ASPEED_I2C_INTR_STS_REG);
ÂÂÂÂÂ spin_unlock(&bus->lock);
-ÂÂÂ return ret ? IRQ_HANDLED : IRQ_NONE;
+ÂÂÂ return bus->irq_status ? IRQ_NONE : IRQ_HANDLED;
 }
 static int aspeed_i2c_master_xfer(struct i2c_adapter *adap,