Re: [PATCH v6 4/4] clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks

From: Stephen Boyd
Date: Wed Jul 25 2018 - 17:28:26 EST


Quoting Aapo Vienamo (2018-07-12 04:53:02)
> From: Peter De-Schrijver <pdeschrijver@xxxxxxxxxx>
>
> These clocks have low jitter paths to certain parents. To model these
> correctly, use the sdmmc mux divider clock type.
>
> Signed-off-by: Peter De-Schrijver <pdeschrijver@xxxxxxxxxx>
> Signed-off-by: Aapo Vienamo <avienamo@xxxxxxxxxx>
> Acked-by: Peter De Schrijver <pdeschrijver@xxxxxxxxxx>
> ---

Applied to clk-next