[PATCH 4.9 113/144] dt-bindings: pinctrl: meson: add support for the Meson8m2 SoC

From: Greg Kroah-Hartman
Date: Wed Aug 01 2018 - 13:30:23 EST

4.9-stable review patch. If anyone has any objections, please let me know.


From: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>

[ Upstream commit 03d9fbc39730b3e6b2e7047dc85f0f70de8fb97d ]

The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b
(such as the Gigabit capable DesignWare MAC).
It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins
get an additional function (four of these are Ethernet RXD2, RXD3, TXD2
and TXD3 which are required when the board uses an RGMII PHY).
The AOBUS pins seem to be identical on Meson8 and Meson8m2.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Reviewed-by: Kevin Hilman <khilman@xxxxxxxxxxxx>
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Sasha Levin <alexander.levin@xxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++
1 file changed, 2 insertions(+)

--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -3,8 +3,10 @@
Required properties for the root node:
- compatible: one of "amlogic,meson8-cbus-pinctrl"
+ "amlogic,meson8m2-cbus-pinctrl"
+ "amlogic,meson8m2-aobus-pinctrl"
- reg: address and size of registers controlling irq functionality