Re: [PATCH v2 1/2] dt-bindings: clock: Introduce QCOM LPASS clock bindings

[Taniya Das]

On 7/7/2018 5:12 AM, Stephen Boyd wrote:
> Quoting Taniya Das (2018-07-04 23:55:20)
> > diff --git a/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt b/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt
> > new file mode 100644
> > index 0000000..fe7378b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt
> > @@ -0,0 +1,22 @@
> > +Qualcomm LPASS Clock Controller Binding
> > +-----------------------------------------------
> > +
> > +Required properties :
> > +- compatible   : shall contain "qcom,sdm845-lpasscc"
> > +- #clock-cells : from common clock binding, shall contain 1.
> > +- reg          : shall contain base register address and size.
> > +- reg-names    : shall contain the register names of LPASS domain
> > +                       "lpass_gcc", "lpass_cc", "lpass_qdsp6ss".
> > +
> > +Example:
> > +
> > +The below node has to be defined in the cases where the LPASS peripheral loader
> > +would bring the subsystem out of reset.
> > +
> > +       lpasscc: clock-controller {
> > +               compatible = "qcom,sdm845-lpasscc";
> > +               reg = <0x00147000 0x20>, <0x17014000 0x1f004>,
>
> This first reg is inside GCC though? Why isn't it added to the gcc
> sdm845 driver? And then the next two might make sense as a different
> region, but the reg property ending in 20 looks really weird.
I have moved the GCC registers in the GCC driver with a device tree 
property flag. And also have mapped the lpass_qdsp6ss CC region.

> > +                       <0x17300020 0x20>;
> > +               reg-names = "lpass_gcc", "lpass_cc", "lpass_qdsp6ss";
> > +               #clock-cells = <1>;
> > +       };

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