Re: [PATCH 2/2] x86/mm/KASLR: Adjust the vmemmap size according to paging mode

From: Baoquan He
Date: Wed Aug 29 2018 - 08:16:31 EST

On 08/29/18 at 03:05pm, Kirill A. Shutemov wrote:
> On Wed, Aug 29, 2018 at 10:17:54AM +0800, Baoquan He wrote:
> > Vmemmap area has different base and size depending on paging mode.
> > Now we just hardcode its size as 1TB in memory KASLR, it's not
> > right for 5-level paging mode.
> >
> > Adjust it according to paging mode and use it during memory KASLR.
> >
> I think 512TiB is wasteful for 5-level paging. We don't need that much.
> 1TiB limit with 4-level paging is required to fit struct pages for all
> 64TiB of physical memory, assuming each struct page is 64 bytes.
> With 5-level paging the limit on physical memory is not 512-times bigger:
> we cap at 52-bit physical address space. So it's just 64 times bigger and
> we need only 64TiB in worst case.

Thanks, Kirill.

Exactly, the current 5-level only costs 64TB for vmemmap at most. I just
copy 512TB from Documentation/x86/x86_64/mm.txt. It might develop very
quickly to need enlarge RAM space to exceed 52bit in the future. And
KASLR and KASAN are mutually exclusive. With KASLR enabled, we can take
another 8PB space reserved for KASAN. So taking 512TB here might not
mitigate KASLR. This is my thought for this fix. But I am also fine to
change it to be 64TB for 5-level paging mode. I can change it with your
idea and repost.