On 12/09/18 12:11, Julien Thierry wrote:
On 12/09/18 11:32, James Morse wrote:
On 28/08/18 16:51, Julien Thierry wrote:
For EL0 entries requiring bp_hardening, daif status is kept at
DAIF_PROCCTX_NOIRQ until after hardening has been done. Then interrupts
are enabled through local_irq_enable().
Before using local_irq_* functions, daifflags should be properly restored
to a state where IRQs are enabled.
Enable IRQs by restoring DAIF_PROCCTX state after bp hardening.
Is this just for symmetry, or are you going on to add something to the daifflags
state that local_irq_* functions won't change? (if so, could you allude to that
in the commit message)
What happens is that once we use ICC_PMR_EL1, local_irq_enable will not touch
PSR.I. And we are coming back from an entry where PSR.I was kept to 1 so
local_irq_enable was not actually enabling the interrupts. On the otherhand,
restore will affect both.
Got it. Thanks!
Does this mean stop_machine()s local_save_flags()/local_irq_restore() will not
be symmetric around __apply_alternatives_multi_stop()?
I see you add alternatives in these in patch 15, but I haven't got that far yet)
Another option is to have the asm macro "enable_da_f" also switch to PMR usage
(i.e. "just keep normal interrupts disabled"). Overall it would probably be
easier to reason with, but I'm just unsure whether it is acceptable to receive a
Pseudo NMI before having applied the bp_hardening.
Wouldn't this give the interrupt controller a headache? I assume IRQs really are
masked when handle_arch_irq is called. (I know nothing about the gic)