[PATCH 4.14 087/115] drm/amdgpu: Fix RLC safe mode test in gfx_v9_0_enter_rlc_safe_mode

From: Greg Kroah-Hartman
Date: Thu Sep 13 2018 - 09:47:11 EST


4.14-stable review patch. If anyone has any objections, please let me know.

------------------

From: Michel DÃnzer <michel.daenzer@xxxxxxx>

commit 226127a67e31a9518d9516d3e4890759b379d874 upstream.

We were testing the register offset, instead of the value stored in the
register, therefore always timing out the loop.

This reduces suspend time of the system in the bug report below by ~600
ms.

Cc: stable@xxxxxxxxxxxxxxx
Bugzilla: https://bugs.freedesktop.org/107277
Tested-by: Paul Menzel <pmenzel@xxxxxxxxxxxxx>
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
Reviewed-by: Junwei Zhang <Jerry.Zhang@xxxxxxx>
Signed-off-by: Michel DÃnzer <michel.daenzer@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3113,7 +3113,7 @@ static void gfx_v9_0_enter_rlc_safe_mode

/* wait for RLC_SAFE_MODE */
for (i = 0; i < adev->usec_timeout; i++) {
- if (!REG_GET_FIELD(SOC15_REG_OFFSET(GC, 0, mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))
+ if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))
break;
udelay(1);
}