Re: [PATCH V3 0/4] Changes for SDCC5 version

[Craig Tatlor]

What socs have you tested this on? 
On sdm660 it seems to crash device
when writing pwr ctl.

On Tue, Jun 19, 2018 at 11:09:17AM +0530, Vijay Viswanath wrote:
> With SDCC5, the MCI register space got removed and the offset/order of
> several registers have changed. Based on SDCC version used and the register,
> we need to pick the base address and offset.
> 
> Depends on patch series: "[PATCH V5 0/2] mmc: sdhci-msm: Configuring IO_PAD support for sdhci-msm"
> 
> Changes since RFC:
> 	Dropped voltage regulator changes in sdhci-msm
> 	Split the "Register changes for sdcc V5" patch
> 	Instead of checking mci removal for deciding which base addr to use,
> 	new function pointers are defined for the 2 variants of sdcc: 
> 		1) MCI present
> 		2) V5 (mci removed)
> 	Instead of string comparing with the compatible string from DT file,
> 	the sdhci_msm_probe will now pick the data associated with the
> 	compatible entry and use it to load variant specific address offsets
> 	and msm variant specific read/write ops.
> 
> Changes since V1:
> 	Removed unused msm_reab & msm_writeb APIs
> 	Changed certain register addresses from uppercase to lowercase hex
> 	letters
> 	Removed extra lines and spaces
> 	Split "[PATCH V1 0/3] Changes for SDCC5 version" patch into two,
> 	one for Documentation and other for the driver changes.
> 
> Changes since V2:
> 	Used lower case for macro function defenitions
> 	Removed unused function pointers for msm_readb & msm_writeb
> 
> 
> Sayali Lokhande (3):
>   mmc: sdhci-msm: Define new Register address map
>   Documentation: sdhci-msm: Add new compatible string for SDCC v5
>   mmc: host: Register changes for sdcc V5
> 
> Vijay Viswanath (1):
>   mmc: sdhci-msm: Add msm version specific ops and data structures
> 
>  .../devicetree/bindings/mmc/sdhci-msm.txt          |   7 +-
>  drivers/mmc/host/sdhci-msm.c                       | 511 ++++++++++++++++-----
>  2 files changed, 391 insertions(+), 127 deletions(-)
> 
> -- 
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> 
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