On Mon, Sep 24, 2018 at 03:15:46PM -0700, Jae Hyun Yoo wrote:
Hi Wolfram,
On 9/24/2018 2:58 PM, Wolfram Sang wrote:
On Tue, Sep 18, 2018 at 11:02:54AM -0700, Jae Hyun Yoo wrote:
On 9/10/2018 2:45 PM, Jae Hyun Yoo wrote:
+- idle-wait-timeout-ms : bus idle waiting timeout in milliseconds when
+ multi-master is set, defaults to 100 ms when not
+ specified.
Will change it to 'aspeed,idle-wait-timeout-ms' as it's a non standard
property.
No need. This binding is not a HW description, so not a DT property in
my book. I still don't understand: Your IP core in master mode does not
have a BUSY bit or similar which detects when a START was detected and
clears after a STOP?
Okay, I'll keep this property as it is then.
Sorry for the misunderstanding. I don't think this a property, at all.
It doesn't describe the hardware, it is more of a configuration thing,
or?