Re: [PATCH RFC v1 5/8] dt-bindings: introduce cpu power domain bindings for Qualcomm SoCs

[Raju P L S S S N]

On 10/11/2018 4:38 PM, Sudeep Holla wrote:
> On Thu, Oct 11, 2018 at 02:50:52AM +0530, Raju P.L.S.S.S.N wrote:
> > Add device binding documentation for Qualcomm Technology Inc's cpu
> > domain driver. The driver is used for managing system sleep activities
> > that are required when application processor is going to deepest low
> > power mode.
>
> So either we are not using PSCI or the binding is not so clear on
> how this co-exist with PSCI power domains. Could you provide details ?
>
> > Cc: devicetree@xxxxxxxxxxxxxxx
> > Signed-off-by: Raju P.L.S.S.S.N <rplsssn@xxxxxxxxxxxxxx>
> > ---
> >   .../bindings/soc/qcom/cpu_power_domain.txt         | 39 ++++++++++++++++++++++
> >   1 file changed, 39 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt
> >
> > diff --git a/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt b/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt
> > new file mode 100644
> > index 0000000..1c8fe69
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt
> > @@ -0,0 +1,39 @@
> > +Qualcomm Technologies cpu power domain
> > +-----------------------------------------
> > +
> > +CPU power domain handles the tasks that need to be performed during
> > +application processor deeper low power mode entry for QCOM SoCs which
> > +have hardened IP blocks combinedly called as RPMH (Resource Power Manager
> > +Hardened) for shared resource management. Flushing the buffered requests
> > +to TCS (Triggered Command Set) in RSC (Resource State Coordinator) and
> > +programming the wakeup timer in PDC (Power Domain Controller) for timer
> > +based wakeup are handled as part of domain power down.
> > +
>
> And which is this not hidden as part of PSCI CPU_SUSPEND ?
>
> > +The bindings for cpu power domain is specified in the RSC section in
> > +devicetree.
> > +
> > +Properties:
> > +- compatible:
> > +	Usage: required
> > +	Value type: <string>
> > +	Definition: must be "qcom,cpu-pm-domain".
> > +
>
> NACK until details on how this can co-exist with PSCI is provided.

Platform coordinated mode is used on this SoC. So they both can 
co-exist. I hope with the discussion on other thread, the details are clear.

> --
> Regards,
> Sudeep