[tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels

[tip-bot for Christoph Hellwig]

Commit-ID:  ab555321e4ddc7f6f17f6c80dfaad228883a8e7c
Gitweb:     https://git.kernel.org/tip/ab555321e4ddc7f6f17f6c80dfaad228883a8e7c
Author:     Christoph Hellwig <hch@xxxxxx>
AuthorDate: Sun, 14 Oct 2018 09:52:08 +0200
Committer:  Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Sun, 14 Oct 2018 11:11:23 +0200

x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels

We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.

Before Linux 4.18 we paper over this fact because the networking code,
the scsi layer and some random block drivers implemented their own
bounce buffering scheme.

Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: tedheadster <tedheadster@xxxxxxxxx>
Tested-by: tedheadster <tedheadster@xxxxxxxxx>
Signed-off-by: Christoph Hellwig <hch@xxxxxx>
Cc: konrad.wilk@xxxxxxxxxx
Cc: iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx
Cc: stable@xxxxxxxxxxxxxxx
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@xxxxxx

---
 arch/x86/kernel/pci-swiotlb.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
 int __init pci_swiotlb_detect_4gb(void)
 {
 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
 		swiotlb = 1;
-#endif
 
 	/*
 	 * If SME is active then swiotlb will be set to 1 so that bounce