RE: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support

[Vabhav Sharma]

> -----Original Message-----
> From: devicetree-owner@xxxxxxxxxxxxxxx <devicetree-owner@xxxxxxxxxxxxxxx>
> On Behalf Of Stephen Boyd
> Sent: Monday, October 15, 2018 10:19 PM
> To: Shawn Guo <shawnguo@xxxxxxxxxx>; Vabhav Sharma
> <vabhav.sharma@xxxxxxx>
> Cc: sudeep.holla@xxxxxxx; oss@xxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx;
> linuxppc-dev@xxxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> mturquette@xxxxxxxxxxxx; rjw@xxxxxxxxxxxxx; viresh.kumar@xxxxxxxxxx;
> linux-clk@xxxxxxxxxxxxxxx; linux-pm@xxxxxxxxxxxxxxx; linux-kernel-
> owner@xxxxxxxxxxxxxxx; catalin.marinas@xxxxxxx; will.deacon@xxxxxxx;
> gregkh@xxxxxxxxxxxxxxxxxxx; arnd@xxxxxxxx;
> kstewart@xxxxxxxxxxxxxxxxxxx; yamada.masahiro@xxxxxxxxxxxxx; Leo Li
> <leoyang.li@xxxxxxx>; linux@xxxxxxxxxxxxxxx; Varun Sethi
> <V.Sethi@xxxxxxx>; Udit Kumar <udit.kumar@xxxxxxx>; Pankaj Bansal
> <pankaj.bansal@xxxxxxx>; Ramneek Mehresh
> <ramneek.mehresh@xxxxxxx>; Ying Zhang <ying.zhang22455@xxxxxxx>;
> Nipun Gupta <nipun.gupta@xxxxxxx>; Priyanka Jain
> <priyanka.jain@xxxxxxx>; Yogesh Narayan Gaur
> <yogeshnarayan.gaur@xxxxxxx>; Sriram Dash <sriram.dash@xxxxxxx>
> Subject: RE: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support
> 
> Quoting Vabhav Sharma (2018-10-14 19:58:15)
> > > > +
> > > > +   pmu {
> > > > +           compatible = "arm,cortex-a72-pmu";
> > > > +           interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> > > > +   };
> > > > +
> > > > +   psci {
> > > > +           compatible = "arm,psci-0.2";
> > > > +           method = "smc";
> > > > +   };
> > > > +
> > > > +   memory@80000000 {
> > > > +           // DRAM space - 1, size : 2 GB DRAM
> > > > +           device_type = "memory";
> > > > +           reg = <0x00000000 0x80000000 0 0x80000000>;
> > > > +   };
> > > > +
> > > > +   ddr1: memory-controller@1080000 {
> > > > +           compatible = "fsl,qoriq-memory-controller";
> > > > +           reg = <0x0 0x1080000 0x0 0x1000>;
> > > > +           interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> > > > +           little-endian;
> > > > +   };
> > > > +
> > > > +   ddr2: memory-controller@1090000 {
> > > > +           compatible = "fsl,qoriq-memory-controller";
> > > > +           reg = <0x0 0x1090000 0x0 0x1000>;
> > > > +           interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
> > > > +           little-endian;
> > > > +   };
> > > > +
> > > > +   sysclk: sysclk {
> > >
> > > Name the node a bit generic like clock-xxx.
> > There is only one clock-unit, Bootloader(U-boot) require sysclk node during
> device tree fix-up as different platform support varied platform frequency as
> per reset configuration word used.
> > Referred other ARM based platform with one clock using name as x: x
> 
> Please add a comment above this node with this information. Newcomers
> reading this DTS file won't have any idea why this node is specially named
> and a comment will help tremendously here.
Sure