Re: [v3 04/12] x86/fsgsbase/64: Enable FSGSBASE instructions in the helper functions

[Bae, Chang Seok]

> On Oct 25, 2018, at 16:00, Andy Lutomirski <luto@xxxxxxxxxx> wrote:
> 
> On Thu, Oct 25, 2018 at 12:32 AM Bae, Chang Seok
> <chang.seok.bae@xxxxxxxxx> wrote:
>> 
>> 
>>> On Oct 24, 2018, at 12:16, Andy Lutomirski <luto@xxxxxxxxxx> wrote:
>>> 
>>> On Tue, Oct 23, 2018 at 11:43 AM Chang S. Bae <chang.seok.bae@xxxxxxxxx> wrote:
>>>> void x86_fsbase_write_cpu(unsigned long fsbase)
>>>> {
>>>> -       /*
>>>> -        * Set the selector to 0 as a notion, that the segment base is
>>>> -        * overwritten, which will be checked for skipping the segment load
>>>> -        * during context switch.
>>>> -        */
>>>> -       loadseg(FS, 0);
>>>> -       wrmsrl(MSR_FS_BASE, fsbase);
>>>> +       if (static_cpu_has(X86_FEATURE_FSGSBASE)) {
>>>> +               wrfsbase(fsbase);
>>>> +       } else {
>>>> +               /*
>>>> +                * Set the selector to 0 as a notion, that the segment base is
>>>> +                * overwritten, which will be checked for skipping the segment load
>>>> +                * during context switch.
>>>> +                */
>>>> +               loadseg(FS, 0);
>>>> +               wrmsrl(MSR_FS_BASE, fsbase);
>>>> +       }
>>>> }
>>>> 
>>>> void x86_gsbase_write_cpu_inactive(unsigned long gsbase)
>>>> {
>>>> -       /* Set the selector to 0 for the same reason as %fs above. */
>>>> -       loadseg(GS, 0);
>>>> -       wrmsrl(MSR_KERNEL_GS_BASE, gsbase);
>>>> +       if (static_cpu_has(X86_FEATURE_FSGSBASE)) {
>>>> +               wr_inactive_gsbase(gsbase);
>>>> +       } else {
>>>> +               /* Set the selector to 0 for the same reason as %fs above. */
>>>> +               loadseg(GS, 0);
>>>> +               wrmsrl(MSR_KERNEL_GS_BASE, gsbase);
>>> 
>>> I still don't get what this code is trying to do.  See other email.  I
>>> think it will straight up crash the kernel on some CPUs, since writing
>>> 0 to %%gs will zero out the *active* base on some CPUs.
>>> 
>> 
>> On those CPUs, how the old do_arch_prctl_64() worked?
>> loadseg(GS, 0) eventually hits the native_load_gs_index entry, where actual
>> mov â, %gs is wrapped by two SWAPGSes. So, it wonât cause the side effect
>> of overwriting the *active* base, I think.
>> 
>>> I think that, if you really want some fancy optimization for the
>>> non-FSGSBASE case, you need to pull that out into the callers of these
>>> helpers.
>> 
> 
> I was thinking of loadsegment, not loadseg.  Sorry!

No problem!  Appreciate your reviews.

Chang