Re: [PATCH v6] clk: qcom: Add lpass clock controller driver for SDM845

[Stephen Boyd]

Quoting tdas@xxxxxxxxxxxxxx (2018-10-25 03:51:01)
> On 2018-10-19 16:09, Taniya Das wrote:
> > On 10/17/2018 7:50 PM, Stephen Boyd wrote:
> >> Quoting Taniya Das (2018-10-17 05:04:10)
> >>> 
> >>> 
> >>> 
> >>> But the problem is not during the above. It is the below
> >>> static void clk_disable_unused_subtree(struct clk_core *core)
> >>> {
> >>> ....
> >>> 
> >>>           if (clk_core_is_enabled(core)) {  --> This access fails.
> >>> ....
> >>> 
> >>> }
> >>> 
> >> 
> >> You may need to add some prepare_ops to turn on clks needed to
> >> read/write lpass registers. Or you can look into using some sort of
> >> genpd to enable required clks when these clks are enabled or disabled.
> >> But I suspect it would be easier to just leave the clks in GCC for 
> >> lpass
> >> always enabled and not worry about the complicated genpd things.
> >> 
> > 
> > I need to check if keeping them enabled/marking them CRITICAL could
> > have an impact on the reset of the subsystem.
> 
> I have checked internally with the teams and the GCC LPASS clocks could 
> be left enabled.
> Would submit a patch keeping them CRITICAL.

Awesome! Thanks for checking.