Re: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller

[Schrempf Frieder]

On 16.11.18 10:46, Yogesh Narayan Gaur wrote:
> Hi Frieder,
> 
>> -----Original Message-----
>> From: Schrempf Frieder [mailto:frieder.schrempf@xxxxxxxxxx]
>> Sent: Friday, November 16, 2018 3:12 PM
>> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@xxxxxxx>
>> Cc: Boris Brezillon <boris.brezillon@xxxxxxxxxxx>; linux-mtd@xxxxxxxxxxxxxxxxxxx;
>> linux-spi@xxxxxxxxxxxxxxx; Marek Vasut <marek.vasut@xxxxxxxxx>; Mark
>> Brown <broonie@xxxxxxxxxx>; Han Xu <han.xu@xxxxxxx>;
>> dwmw2@xxxxxxxxxxxxx; computersforpeace@xxxxxxxxx; richard@xxxxxx;
>> miquel.raynal@xxxxxxxxxxx; David Wolfe <david.wolfe@xxxxxxx>; Fabio
>> Estevam <fabio.estevam@xxxxxxx>; Prabhakar Kushwaha
>> <prabhakar.kushwaha@xxxxxxx>; shawnguo@xxxxxxxxxx; linux-
>> kernel@xxxxxxxxxxxxxxx
>> Subject: Re: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP QuadSPI
>> controller
>>
>> Hi Yogesh,
>>
>> On 16.11.18 06:41, Yogesh Narayan Gaur wrote:
>>> Hi Frieder,
>>>
>>>> -----Original Message-----
>>>> From: Schrempf Frieder [mailto:frieder.schrempf@xxxxxxxxxx]
>>>> Sent: Thursday, November 15, 2018 7:32 PM
>>>> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@xxxxxxx>
>>>> Cc: Boris Brezillon <boris.brezillon@xxxxxxxxxxx>;
>>>> linux-mtd@xxxxxxxxxxxxxxxxxxx; linux-spi@xxxxxxxxxxxxxxx; Marek Vasut
>>>> <marek.vasut@xxxxxxxxx>; Mark Brown <broonie@xxxxxxxxxx>; Han Xu
>>>> <han.xu@xxxxxxx>; dwmw2@xxxxxxxxxxxxx;
>> computersforpeace@xxxxxxxxx;
>>>> richard@xxxxxx; miquel.raynal@xxxxxxxxxxx; David Wolfe
>>>> <david.wolfe@xxxxxxx>; Fabio Estevam <fabio.estevam@xxxxxxx>;
>>>> Prabhakar Kushwaha <prabhakar.kushwaha@xxxxxxx>;
>> shawnguo@xxxxxxxxxx;
>>>> linux- kernel@xxxxxxxxxxxxxxx
>>>> Subject: Re: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP
>>>> QuadSPI controller
>>>>
>>>> Hi Yogesh,
>>>>
>>>> On 15.11.18 14:12, Boris Brezillon wrote:
>>>>> On Thu, 15 Nov 2018 11:43:05 +0000
>>>>> Schrempf Frieder <frieder.schrempf@xxxxxxxxxx> wrote:
>>>>>
>>>>>> On 15.11.18 07:22, Yogesh Narayan Gaur wrote:
>>>>>>> Hi Frieder,
>>>>>>>
>>>>>>> With below patch on top of your v5, Read/Write/Erase on CS1 is
>>>>>>> working
>>>> fine for me.
>>>>>>
>>>>>> Ok, are you sure, that AHB read is working too with this patch?
>>>>>> You are removing the memmap_phy offset from SFAR and the SFXXAD
>>>>>> register values.
>>>>>>
>>>>>> I can understand that selection of the CS and IP commands will work
>>>>>> like this, but I can't understand how AHB read should work without
>>>>>> the base address of the mapped memory.
>>>>>>
>>>>>> I'm afraid I still don't fully understand the background of these
>>>>>> things,
>>>>>
>>>>> Same here. Yogesh, can you give us more detail on why you decided to
>>>>> drop the memmap_phy offset?
>>>>
>>>> Your changes do not work on my setup (i.MX6UL). It looks like your
>>>> hardware is different.
>>>>
>>>> I found this patch for LS2080A: [1]. This would explain why you need
>>>> to remove the offset to make it work.
>>>>
>>>> To verify this, could you please test your setup with the current
>>>> spi-nor driver (fsl_quadspi.c). If our assumptions are right, it
>>>> should only work on CS0 and CS1 with [1] applied.
>>>>
>>>
>>> Yes, I need to remove the offset to make it work and this is required for the
>> NXP Layerscape-2.x SoCs like LS208x/Ls108x etc.
>>>
>>> I have modified the patch and have introduced entry in quirks for ls2080a. With
>> this Read/Write/Erase are working for me for both CS.
>>
>> Ok, what I was asking for is a test with the original, unmodified SPI NOR driver in
>> mtd/spi-nor/fsl-quadspi.c. We need this to confirm that the problem is really
>> what we think, or to find out if we missed something.
>>
>> Can you please do a quick test? If it confirms our assumptions, I will send a new
>> version with the quirk and hopefully we can then move on.
>>
> 
> Yes, problem exist with original un-modified upstread SPI-NOR driver also.
> Actually, internally we are maintaining driver with some local change and one of the change is related to same i.e. making having map_addr as 0 for layerscape chips.
> 
> I have tested, that by removing that CS1 access shows error.

Ok, thank you for clarifying this!

> 
> Please integrate these changes in your next version.

Ok.

Thanks,
Frieder