[PATCH v2] x86/cpu/AMD: Fix CPB bit for more processors

[Jiaxun Yang]

CPUID Fn8000_0007_EDX[CPB] is wrongly 0 on some newer F17h
procssors but their revision guide has not been released.

For example,Tesed on AMD "Ryzen 7 2700U with Radeon Vega Mobile Gfx"
and "AMD Ryzen 5 2500U with Radeon Vega Mobile Gfx",
their CPUID Fn0000_0001_EAX is 0x00810f10 and should have
CPB feature according AMD product specifications, however
their Fn8000_0007_EDX is 0x00006599, indicating they don't
support CPB feature.

Since whole F17h should support CPB, we set the cap for all of
them.

Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
---
 arch/x86/kernel/cpu/amd.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index eeea634bee0a..37989fa9e620 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -818,12 +818,13 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
 static void init_amd_zn(struct cpuinfo_x86 *c)
 {
 	set_cpu_cap(c, X86_FEATURE_ZEN);
+
 	/*
 	 * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
-	 * all up to and including B1.
+	 * a lot of Family 17h processors and some models are undocumented, since
+	 * whole F17h should support CPB, we set the cap for all of them.
 	 */
-	if (c->x86_model <= 1 && c->x86_stepping <= 1)
-		set_cpu_cap(c, X86_FEATURE_CPB);
+	set_cpu_cap(c, X86_FEATURE_CPB);
 }

 static void init_amd(struct cpuinfo_x86 *c)
--
2.19.1