RE: [PATCHv2 05/25] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows

[M.h. Lian]

reviewed-by: Minghuan Lian <Minghuan.Lian@xxxxxxx>

> -----Original Message-----
> From: Z.q. Hou
> Sent: Tuesday, November 20, 2018 5:26 PM
> To: linux-pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> bhelgaas@xxxxxxxxxx; robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx;
> l.subrahmanya@xxxxxxxxxxxxxx; shawnguo@xxxxxxxxxx; Leo Li
> <leoyang.li@xxxxxxx>; lorenzo.pieralisi@xxxxxxx;
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> Cc: Mingkai Hu <mingkai.hu@xxxxxxx>; M.h. Lian
> <minghuan.lian@xxxxxxx>; Xiaowei Bao <xiaowei.bao@xxxxxxx>; Z.q. Hou
> <zhiqiang.hou@xxxxxxx>
> Subject: [PATCHv2 05/25] PCI: mobiveil: correct PCI base address in MEM/IO
> outbound windows
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx>
> 
> It should get PCI base address from the DT node property 'ranges'
> to setup MEM/IO outbound windows instead of always zero.
> 
> Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx>
> ---
> V2:
>  - Added fixes entry.
> 
>  drivers/pci/controller/pcie-mobiveil.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mobiveil.c
> b/drivers/pci/controller/pcie-mobiveil.c
> index a0dd337c6214..8ff873023b5f 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie
> *pcie)
> 
>  		/* configure outbound translation window */
>  		program_ob_windows(pcie, pcie->ob_wins_configured,
> -				   win->res->start, 0, type,
> -				   resource_size(win->res));
> +				   win->res->start,
> +				   win->res->start - win->offset,
> +				   type, resource_size(win->res));
>  	}
> 
>  	/* setup MSI hardware registers */
> --
> 2.17.1