Re: [PATCH 2/3] ntb_hw_switchtec: Added support of >=4G memory windows

From: kbuild test robot
Date: Fri Nov 23 2018 - 10:54:22 EST


Hi Paul,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v4.20-rc3 next-20181123]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Wesley-Sheng/ntb_hw_switchtec-Added-support-of-4G-memory-windows/20181123-231700
config: i386-randconfig-x077-201846 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386

All warnings (new ones prefixed by >>):

drivers/ntb/hw/mscc/ntb_hw_switchtec.c: In function 'switchtec_ntb_mw_set_direct':
>> drivers/ntb/hw/mscc/ntb_hw_switchtec.c:292:17: warning: right shift count >= width of type [-Wshift-count-overflow]
iowrite32(size >> 32, &ctl->bar_ext_entry[bar].win_size);
^~
drivers/ntb/hw/mscc/ntb_hw_switchtec.c: In function 'crosslink_setup_mws':
drivers/ntb/hw/mscc/ntb_hw_switchtec.c:1061:18: warning: right shift count >= width of type [-Wshift-count-overflow]
iowrite32(size >> 32, &ctl->bar_ext_entry[bar].win_size);
^~

vim +292 drivers/ntb/hw/mscc/ntb_hw_switchtec.c

277
278 static void switchtec_ntb_mw_set_direct(struct switchtec_ntb *sndev, int idx,
279 dma_addr_t addr, resource_size_t size)
280 {
281 int xlate_pos = ilog2(size);
282 int bar = sndev->peer_direct_mw_to_bar[idx];
283 struct ntb_ctrl_regs __iomem *ctl = sndev->mmio_peer_ctrl;
284 u32 ctl_val;
285
286 ctl_val = ioread32(&ctl->bar_entry[bar].ctl);
287 ctl_val |= NTB_CTRL_BAR_DIR_WIN_EN;
288
289 iowrite32(ctl_val, &ctl->bar_entry[bar].ctl);
290 iowrite32(xlate_pos | (size & 0xFFFFF000),
291 &ctl->bar_entry[bar].win_size);
> 292 iowrite32(size >> 32, &ctl->bar_ext_entry[bar].win_size);
293 iowrite64(sndev->self_partition | addr,
294 &ctl->bar_entry[bar].xlate_addr);
295 }
296

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