Re: [patch V2 27/28] x86/speculation: Add seccomp Spectre v2 user space protection mode

[Ingo Molnar]

* Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:

> On Sun, 25 Nov 2018, Linus Torvalds wrote:
> 
> > [ You forgot to fix your quilt setup.. ]
> 
> Duh. Should have pinned that package.
> 
> > On Sun, 25 Nov 2018, Thomas Gleixner wrote:
> > >
> > > The mitigation guide documents how STIPB works:
> > >
> > >    Setting bit 1 (STIBP) of the IA32_SPEC_CTRL MSR on a logical processor
> > >    prevents the predicted targets of indirect branches on any logical
> > >    processor of that core from being controlled by software that executes
> > >    (or executed previously) on another logical processor of the same core.
> > 
> > Can we please just fix this stupid lie?
> 
> Well, it's not a lie. The above is correct, it just does not tell WHY this
> works.

Well, it's a "technically correct but misleading" phrase, which has much 
more of the effects of an actual "lie" than that of a true description of 
it.

I.e. in terms of what effects it's likely going to have on readers not 
aware of the underlying mechanics it's much more correct to call it a 
"lie" than to call it "truth" - which I think is at the core of Linus's 
argument.

> > Yes, Intel calls it "STIBP" and tries to make it out to be about the 
> > indirect branch predictor being per-SMT thread.
> > 
> > But the reason it is unacceptable is apparently because in reality it 
> > just disables indirect branch prediction entirely. So yes, 
> > *technically* it's true that that limits indirect branch prediction 
> > to just a single SMT core, but in reality it is just a "go really 
> > slow" mode.
> 
> Indeed. Just checked the documentation again, it's also not clear 
> whether IBPB is required if STIPB is in use.

So I think we should clarify all this.

Thanks,

	Ingo