Re: [RCF PATCH,v2,2/2] pwm: imx: Configure output to GPIO in disabled state

[Thierry Reding]

On Mon, Nov 26, 2018 at 01:23:16PM +0100, Lothar WaÃmann wrote:
> Thierry Reding <thierry.reding@xxxxxxxxx> wrote:
> 
> > On Fri, Nov 23, 2018 at 03:15:11PM +0000, VokÃÄ Michal wrote:
> > > On 22.11.2018 20:03, Uwe Kleine-KÃnig wrote:  
> > > > On Thu, Nov 22, 2018 at 04:46:39PM +0000, VokÃÄ Michal wrote:  
> > > >> On 22.11.2018 17:23, Uwe Kleine-KÃnig wrote:  
> > > >>> On Thu, Nov 22, 2018 at 03:42:14PM +0000, VokÃÄ Michal wrote:  
> > > >>>> On 16.11.2018 09:25, Uwe Kleine-KÃnig wrote:  
> > > >>>>> On Fri, Nov 16, 2018 at 08:34:30AM +0100, Lothar WaÃmann wrote:  
> > > >>>>>> No. You can disable the output driver via pinctrl, so that only the
> > > >>>>>> selected pull-up/down is relevant. The pin function and GPIO register
> > > >>>>>> settings don't matter at all in this case.  
> > > >>>>
> > > >>>> Lothar, please can you be more specific how would you do that? IFAIK the
> > > >>>> pull-up/down internal resistors have effect only if the pin is configured
> > > >>>> as GPIO *input* (on i.MX6 at least). See the TRM, 29.4.2.2 Output driver:
> > > >>>>
> > > >>>>     "Internal pull-up, pull-down resistors, and pad keeper are disabled in
> > > >>>>      output mode."  
> > > > 
> > > > This would mean you'd have to rely on an external pull up for your use
> > > > case. I wouldn't be surprised however if DSE=0 wouldn't count as "output
> > > > mode". Given the reliability of NXP documentation I wouldn't bet neither
> > > > on one nor the other possibility.  
> > > 
> > > Yeah, the NXP documentation sometimes does not really match reality.
> > > My use case is based on the fact that I configure the pin as input in
> > > the driver. Then it works just fine.
> > >   
> > > >>> So I'd expect this to really work on i.MX6 but not the earlier SoCs
> > > >>> without a gpio specifier.  
> > > >>
> > > >> Maybe you would expect it to work but I already tested and measured
> > > >> that weeks ago ;) It did not work.  
> > > > 
> > > > Which pin/gpio do we talk about? Which i.MX6 variant did you test this
> > > > on? (Assuming i.MX6D or i.MX6Q and PAD_DISP0_DATA09, did you try setting
> > > > 
> > > > 	IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA09 (0x020E0194) = 0x00000005
> > > > 	IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA09 (0x020E04A8) = 0x0000b080
> > > > 
> > > > and then play with GPIO 4.30 direction and output value?)  
> > > 
> > > My test setup is as follows:
> > > - SoC is i.MX6DL or i.MX6S - I have three board variants in total.
> > > - Pin used for PWM/GPIO is PAD_GPIO9.
> > > - The pin is not connected to any circuit. Just a test point.
> > > - pinctrl setup in DT:
> > >    - for "pwm":
> > >      - fsl,pins = <MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8>
> > >      - IOMUXC_SW_MUX_CTL_PAD_GPIO09 = 0x00000004
> > >      - IOMUXC_SW_PAD_CTL_PAD_GPIO09 = 0x00000008
> > > 
> > >    - for "gpio":
> > >     - fsl,pins = <MX6QDL_PAD_GPIO_9__GPIO1_IO09 0xb000>
> > >     - IOMUXC_SW_MUX_CTL_PAD_GPIO09 = 0x00000005
> > >     - IOMUXC_SW_PAD_CTL_PAD_GPIO09 = 0x0000b000  
> > 
> > Does it help if you additionally set the ODE bit (bit 11) here?
> > 
> That only helps to NOT actively pulling the pin HIGH, but the opposite
> is what is needed here.

From the description in the reference manual it sounded like the ODE
would avoid the pin from actively being driven anywhere if configured as
output. So I was hoping that in conjunction with the pull-up it would
actually do the right thing.

Thierry

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