Quoting Lina Iyer (2018-11-20 16:06:47)Why? Every driver seems to translate the hardware IRQ and pass it to
SDM845 SoC has an always-on interrupt controller (PDC) with select GPIO
routed to the PDC as interrupts that can be used to wake the system up
from deep low power modes and suspend.
Signed-off-by: Lina Iyer <ilina@xxxxxxxxxxxxxx>
---
.../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 31 ++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
index 665aadb5ea28..bedfa0b57fa6 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
@@ -29,6 +29,17 @@ SDM845 platform.
Definition: must be 2. Specifying the pin number and flags, as defined
in <dt-bindings/interrupt-controller/irq.h>
+- wakeup-parent:
+ Usage: optional
+ Value type: <phandle>
+ Definition: A phandle to the wakeup interrupt controller for the SoC.
+
+- wakeup-irq:
This shouldn't be needed. TLMM driver can probe for the possibility of
wakeup capable irqs from irq allocation step. The only place we should
need to know what TLMM pins map to what PDC lines is in the PDC driver.