Re: [patch V2 27/28] x86/speculation: Add seccomp Spectre v2 user space protection mode
From: Lendacky, Thomas
Date: Mon Nov 26 2018 - 16:53:07 EST
On 11/26/2018 02:58 PM, Thomas Gleixner wrote:
> On Mon, 26 Nov 2018, Andrea Arcangeli wrote:
>
>> Hello,
>>
>> On Sun, Nov 25, 2018 at 11:28:59PM +0100, Thomas Gleixner wrote:
>>> Indeed. Just checked the documentation again, it's also not clear whether
>>> IBPB is required if STIPB is in use.
>>
>> I tried to ask this question too earlier:
>>
>> https://lkml.kernel.org/r/20181119234528.GJ29258@xxxxxxxxxx
>>
>> If the BTB mistraining in SECCOMP context with STIBP set in SPEC_CTRL,
>> can still influence the hyperthreading sibling after STIBP is cleared,
>> IBPB is needed before clearing STIBP. Otherwise it's not. Unless told
>> otherwise, it'd be safe to assume IBPB is needed in such case.
>
> IBPB is still issued. I won't change that before we have clarification.
From an AMD standpoint, we recommend still issuing the IBPB.
>
> But I doubt it's necessary. STIBP seems to be a rather big hammer.
For AMD parts that support STIBP, you will see likely differing levels
of performance impact. AMD also has a CPUID bit (0x8000_0008_EBX[17])
that indicates STIBP always on mode is preferred [1] to toggling the
MSR.
I was planning to do a follow on patch set for that support after this
series is accepted rather than ask that it be added to this series at
this time (unless folks would prefer that it be done now?).
Thanks,
Tom
[1] https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf
>
> Thanks,
>
> tglx
>