Re: [RFC PATCH] net: macb: Apply RXUBR workaround only to versions with errata

[Harini Katakam]

Hi Claudiu,
On Thu, Nov 29, 2018 at 3:51 PM <Claudiu.Beznea@xxxxxxxxxxxxx> wrote:
>
>
>
> On 23.11.2018 11:59, Harini Katakam wrote:
<snip>
> > -             if (status & MACB_BIT(RXUBR)) {
> > +             if ((bp->errata & MACB_ERRATA_RXLOCKUP) &&
> > +                 (status & MACB_BIT(RXUBR))) {
>
> Just asking, did you manage to test this on other platforms that haven't
> this issue?
> SAMA5D2 datasheet [1] states this:
> "When in packet buffer full store and forward mode, only good received
> frames are written out of the DMA, so no
>  fragments will exist in the AHB buffers due to MAC receiver errors. There
> is still the possibility of fragments due to
>  DMA errors, for example used bit read on the second buffer of a
> multibuffer frame."
>
> But it is true that nowhere is presented that this must be special treated.
>

Yes, I tested it on ZynqMP which does NOT have this errata - did perf and
ping flood and dint see any issues.
Just FYI, the errata in the IP version in Zynq causes an RX lock up under
high stress (when there is obviously multiple RXUBR interrupts). The RX reset
is a pre-emptive workaround to *mostly* avoid the issue.
Please see Answer record 52028 in
https://www.xilinx.com/support/documentation/errata/en247.pdf

> Moreover, if you do this only for MACB_ERRATA_RXLOCKUP and still have RXUBR
> interrupt enabled every time it would not make sense to still enable it.
> Or, if you want it enabled every time, you should clear it no matter the
> MACB_ERRATA_RXLOCKUP is set or not, with something like this:
>
>                         if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
>
>                                 queue_writel(queue, ISR, MACB_BIT(RXUBR));
>
>
Thanks for pointing this out - yes i'll move the WTC code outside the check.

Regards,
Harini