Re: [PATCH V6 0/9] clk: add imx7ulp clk support

From: Stephen Boyd
Date: Mon Dec 03 2018 - 14:31:46 EST


Quoting A.s. Dong (2018-11-14 05:01:31)
> This patch series intends to add imx7ulp clk support.
>
> i.MX7ULP Clock functions are under joint control of the System
> Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
> modules, and Core Mode Controller (CMC)1 blocks
>
> The clocking scheme provides clear separation between M4 domain
> and A7 domain. Except for a few clock sources shared between two
> domains, such as the System Oscillator clock, the Slow IRC (SIRC),
> and and the Fast IRC clock (FIRCLK), clock sources and clock
> management are separated and contained within each domain.
>
> M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
> A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
>
> Note: this series only adds A7 clock domain support as M4 clock
> domain will be handled by M4 seperately.
>

I got:

drivers/clk/imx/clk-pllv4.c:152:15: warning: symbol 'imx_clk_pllv4' was not declared. Should it be static?
drivers/clk/imx/clk-pfdv2.c:166:15: warning: symbol 'imx_clk_pfdv2' was not declared. Should it be static?
drivers/clk/imx/clk-divider-gate.c:174:15: warning: symbol 'imx_clk_divider_gate' was not declared. Should it be static?
drivers/clk/imx/clk-composite-7ulp.c:22:15: warning: symbol 'imx7ulp_clk_composite' was not declared. Should it be static?

which I can fix easily by throwing in clk.h into each file.