Re: [PATCH 4.14 121/146] x86/fpu: Disable bottom halves while loading FPU registers

From: Jari Ruusu
Date: Wed Dec 05 2018 - 11:38:40 EST


Greg Kroah-Hartman wrote:
> commit 68239654acafe6aad5a3c1dc7237e60accfebc03 upstream.
>
> The sequence
>
> fpu->initialized = 1; /* step A */
> preempt_disable(); /* step B */
> fpu__restore(fpu);
> preempt_enable();
>
> in __fpu__restore_sig() is racy in regard to a context switch.

That same race appears to be present in older kernel branches also.
The context is sligthly different, so the patch for 4.14 does not
apply cleanly to older kernels. For 4.9 branch, this edit works:

s/fpu->initialized/fpu->fpstate_active/

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -342,10 +342,10 @@ static int __fpu__restore_sig(void __use
sanitize_restored_xstate(tsk, &env, xfeatures, fx_only);
}

+ local_bh_disable();
fpu->fpstate_active = 1;
- preempt_disable();
fpu__restore(fpu);
- preempt_enable();
+ local_bh_enable();

return err;
} else {