Re: Patrol scrub questions

From: York Sun
Date: Wed Dec 05 2018 - 17:12:50 EST


On 12/5/18 2:00 PM, Tracy Smith wrote:
>> Single-bit errors are corrected by memory controller without involving software.
>
> Sorry for being verbose, but I need to explain the reason for the
> questions below since I need to determine if a memory scrub is
> required on layerscape and why. There are multiple layers to the
> problem of ECC.
>
> First layer, there is the immediate 'correction' of a flipped bit.
>
> This does not 'fix' the source of the error but corrects the flipped
> bit for use by the processor.
>
> Most bit flips will be due to either a transitory noise problem on the
> bus, which will not be associated with any given memory cell, OR it
> will be due to a cosmic-ray induced bit flip in the memory cell which
> will stay 'flipped' until the location has been written to again.
>
> The safe action is to write the ECC corrected data back to the same
> 'error' location in memory. Does the layerscape memory controller
> without software intervention do this?
>
> Question 1) Does the layerscape memory controller automatically
> perform a write of the corrected data back to the 'error' location to
> make a correction? If not, is a patrol scrub required to do this?
>

Tracy,

Layerscape SoCs have the feature to fix any detected single-bit errors.
It is not part of EDAC driver. The error is still counted so EDAC driver
can "see" this error. You can refer to SoC reference manual.

> Question 3) Because the memory controller or layerscape platform must
> assume a UE is critical, will a single UE on layersape cause a WDT to
> be triggered and a reset to occur?

No.

>
> Question 4) If so, will a panic ever be called if there is a hardware
> uncorrectable memory failure?

No. It is up to upper layer of EDAC driver. Layerscape driver only
reports CEs and UEs.

York