Re: [PATCH] PCI: controller: dwc: Make PCI_IMX6 depend on PCIEPORTBUS
From: Robert Hancock
Date: Thu Dec 06 2018 - 11:10:04 EST
On 2018-12-06 9:50 a.m., Lucas Stach wrote:
> Am Donnerstag, den 06.12.2018, 09:45 -0600 schrieb Robert Hancock:
>> On 2018-12-06 2:10 a.m., Baruch Siach wrote:
>>> Hi Andrey,
>>>
>>> Adding Robert Hancock who reported[1] on a PCIe MSI issue with i.MX6.
>>>
>>> Andrey Smirnov writes:
>>>
>>>> Building a kernel with CONFIG_PCI_IMX6=y, but CONFIG_PCIEPORTBUS=n
>>>> produces a system where built-in PCIE bridge (16c3:abcd) isn't bound
>>>> to pcieport driver. This, in turn, results in a PCIE bus that is
>>>> capable of enumerating attached PCIE device, but lacks functional
>>>> interrupt support.
>>>
>>> Robert, does that fix your issue?
>>
>> Unfortunately, no.. in fact the situation on my setup is even worse with
>> CONFIG_PCIEPORTBUS enabled: Not only does MSI still not function, but
>> now INTx interrupts are somehow broken as well - no interrupts are
>> received. The IRQ information shown in /proc/interrupts is correct, but
>> the count remains stubbornly at 0.
>
> That's expected. The port services will use an MSI IRQ when available
> and due to a design issue with the DWC PCIe it will not forward any
> legacy IRQs if any MSI is in use. If any of the PCIe devices in your
> system are unable to work with MSI IRQs, you must boot with "nomsi" on
> the kernel command line set.
That seems like an unfortunate design choice on their part.. well that
would probably argue against adding this as a hard dependency then, if
non-MSI-supporting PCIe devices can't work with default boot options
with that set.
I'm looking into testing with an NXP Smart Devices board and some PCIe
cards to see if I can verify whether MSI works on those or not, since we
currently don't have a way to independently verify that the MSI
implementation in our FPGA is working or whether another PCIe device
works with MSI (the FPGA is integrated on the system board).
--
Robert Hancock
Senior Software Developer
SED Systems
Email: hancock@xxxxxxxxxxxxx