Coresight etmv4 enable over 32bit kernel
From: Lei Wen
Date: Sat Dec 08 2018 - 07:05:20 EST
I am enabling etmv4 coresight over one Cortex-A7 soc, using 32bit kernel.
And I am following  to do experiment regarding the addr_range feature.
The default addr_range is set as _stext~_etext, and it works fine with
etb as sink,
and etm as source. I could see there are valid kernel addresses using OpenCSD.
But while I try to store one small range of address pair, which contain only one
kernel function. It doesn't behavior like what said in , the write
grows rapidly with the read pointer. And I dump the etb buffer and parse it with
openCSD, finding that there is no I_ASYNC packet in the dump and is fulled with
So my question is why ETB continue to grow when there is no trigger at all?
Is it normal? I could provide more info if you need it.