[PATCH v2 1/4] dt-bindings: Correct RISC-V's timebase-frequency

[Atish Patra]

From: Palmer Dabbelt <palmer@xxxxxxxxxx>

In RISC-V systems, timebase-frequency is per cpu instead of one
instance for entire SOC as there is a individual timer per each CPU.
Fix the DT binding accordingly.

Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxx>
Signed-off-by: Christoph Hellwig <hch@xxxxxx>
[Atish: Update the commit text]
Signed-off-by: Atish Patra <atish.patra@xxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
---
 Documentation/devicetree/bindings/riscv/cpus.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.txt b/Documentation/devicetree/bindings/riscv/cpus.txt
index adf7b7af..b0b038d6 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.txt
+++ b/Documentation/devicetree/bindings/riscv/cpus.txt
@@ -93,9 +93,9 @@ Linux is allowed to run on.
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                timebase-frequency = <1000000>;
                 cpu@0 {
                         clock-frequency = <1600000000>;
+                        timebase-frequency = <1000000>;
                         compatible = "sifive,rocket0", "riscv";
                         device_type = "cpu";
                         i-cache-block-size = <64>;
@@ -113,6 +113,7 @@ Linux is allowed to run on.
                 };
                 cpu@1 {
                         clock-frequency = <1600000000>;
+                        timebase-frequency = <1000000>;
                         compatible = "sifive,rocket0", "riscv";
                         d-cache-block-size = <64>;
                         d-cache-sets = <64>;
@@ -145,6 +146,7 @@ Example: Spike ISA Simulator with 1 Hart
 This device tree matches the Spike ISA golden model as run with `spike -p1`.
 
         cpus {
+                timebase-frequency = <1000000>;
                 cpu@0 {
                         device_type = "cpu";
                         reg = <0x00000000>;
-- 
2.7.4