Re: [PATCH 1/2] staging: iio: adc: ad7192: Add clock for external clock reference
From: Stephen Boyd
Date: Thu Dec 13 2018 - 20:39:26 EST
Quoting Jonathan Cameron (2018-12-08 07:29:54)
> On Thu, 6 Dec 2018 11:10:51 +0200
> Mircea Caprioru <mircea.caprioru@xxxxxxxxxx> wrote:
> > This patch adds a clock to the state structure of ad7192 for getting the
> > external clock frequency. This modifications is in accordance with clock
> > framework dt bindings documentation.
> > Signed-off-by: Mircea Caprioru <mircea.caprioru@xxxxxxxxxx>
> +cc Rob and the clk list for advise on how to do the binding for this one.
> It is basically 2 pins, you can put a clock in on one of them or connect
> a crystal across them. The driver has to set a register to say which is
> the case.
> Current proposal is two optional clocks (fall back to internal oscillator)
> but that doesn't seem to be commonly done, so I'm wondering if there
> is a 'standard' way to handle this sort of thing.
I'm not sure I fully understand, but I think perhaps
assigned-clock-parents would work? Or does that not work because either
way some parent is assigned, either the crystal or the optional clk that
isn't a crystal?