Re: [PATCH v3 01/12] clk: mediatek: fixup: Disable tuner_en before change PLL rate
From: Stephen Boyd
Date: Fri Dec 14 2018 - 16:57:43 EST
Why is "fixup" in the subject of this patch?
Quoting Weiyi Lu (2018-12-09 23:32:29)
> From: Owen Chen <owen.chen@xxxxxxxxxxxx>
>
> PLLs with tuner_en bit, such as APLL1, need to disable
> tuner_en before apply new frequency settings, or the new frequency
> settings (pcw) will not be applied.
> The tuner_en bit will be disabled during changing PLL rate
> and be restored after new settings applied.
> Another minor change is to correct the macro name of pcw change bit
> to CON1_PCW_CHG because PCW_CHG(BIT31) is on CON1.
>
> Cc: <stable@xxxxxxxxxxxxxxx>
> Signed-off-by: Owen Chen <owen.chen@xxxxxxxxxxxx>
So there should be some Fixes: tag here too so we know what commit is
being fixed?