Re: [PATCH v5 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver
From: kbuild test robot
Date: Tue Jan 08 2019 - 07:08:59 EST
Hi Mason,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on spi/for-next]
[also build test ERROR on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Mason-Yang/spi-Add-Renesas-R-Car-Gen3-RPC-IF-SPI-controller-driver/20190108-165354
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
config: nds32-allyesconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 6.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=6.4.0 make.cross ARCH=nds32
All errors (new ones prefixed by >>):
drivers/spi/spi-renesas-rpc.c: In function 'rpc_spi_io_xfer':
>> drivers/spi/spi-renesas-rpc.c:285:10: error: implicit declaration of function 'readq' [-Werror=implicit-function-declaration]
tmp = readq(rpc->dirmap);
^~~~~
cc1: some warnings being treated as errors
vim +/readq +285 drivers/spi/spi-renesas-rpc.c
222
223 static int rpc_spi_io_xfer(struct rpc_spi *rpc,
224 const void *tx_buf, void *rx_buf)
225 {
226 u32 smenr, smcr, data, pos = 0;
227 int ret = 0;
228
229 regmap_update_bits(rpc->regmap, RPC_CMNCR, RPC_CMNCR_MD, RPC_CMNCR_MD);
230 regmap_write(rpc->regmap, RPC_SMDRENR, 0);
231 regmap_write(rpc->regmap, RPC_SMCMR, rpc->cmd);
232 regmap_write(rpc->regmap, RPC_SMDMCR, rpc->dummy);
233 regmap_write(rpc->regmap, RPC_SMADR, rpc->addr);
234 smenr = rpc->smenr;
235
236 if (tx_buf) {
237 while (pos < rpc->xferlen) {
238 u32 nbytes = rpc->xferlen - pos;
239
240 regmap_write(rpc->regmap, RPC_SMWDR0,
241 get_unaligned((u32 *)(tx_buf + pos)));
242
243 smcr = rpc->smcr | RPC_SMCR_SPIE;
244
245 if (nbytes > 4) {
246 nbytes = 4;
247 smcr |= RPC_SMCR_SSLKP;
248 }
249
250 regmap_write(rpc->regmap, RPC_SMENR, smenr);
251 regmap_write(rpc->regmap, RPC_SMCR, smcr);
252 ret = wait_msg_xfer_end(rpc);
253 if (ret)
254 goto out;
255
256 pos += nbytes;
257 smenr = rpc->smenr & ~RPC_SMENR_CDE &
258 ~RPC_SMENR_ADE(0xf);
259 }
260 } else if (rx_buf) {
261 //
262 // RPC-IF spoils the data for the commands without an address
263 // phase (like RDID) in the manual mode, so we'll have to work
264 // around this issue by using the external address space read
265 // mode instead; we seem to be able to read 8 bytes at most in
266 // this mode though...
267 //
268 if (!(smenr & RPC_SMENR_ADE(0xf))) {
269 u32 nbytes = rpc->xferlen - pos;
270 u64 tmp;
271
272 if (nbytes > 8)
273 nbytes = 8;
274
275 regmap_update_bits(rpc->regmap, RPC_CMNCR,
276 RPC_CMNCR_MD, 0);
277 regmap_write(rpc->regmap, RPC_DRCR, 0);
278 regmap_write(rpc->regmap, RPC_DREAR, RPC_DREAR_EAC(1));
279 regmap_write(rpc->regmap, RPC_DRCMR, rpc->cmd);
280 regmap_write(rpc->regmap, RPC_DRDMCR, rpc->dummy);
281 regmap_write(rpc->regmap, RPC_DROPR, 0);
282 regmap_write(rpc->regmap, RPC_DRENR, rpc->smenr &
283 ~RPC_SMENR_SPIDE(0xf));
284
> 285 tmp = readq(rpc->dirmap);
286 memcpy(rx_buf, &tmp, nbytes);
287 } else {
288 while (pos < rpc->xferlen) {
289 u32 nbytes = rpc->xferlen - pos;
290
291 if (nbytes > 4)
292 nbytes = 4;
293
294 regmap_write(rpc->regmap, RPC_SMENR, smenr);
295 regmap_write(rpc->regmap, RPC_SMCR, rpc->smcr |
296 RPC_SMCR_SPIE);
297 ret = wait_msg_xfer_end(rpc);
298 if (ret)
299 goto out;
300
301 regmap_read(rpc->regmap, RPC_SMRDR0, &data);
302 memcpy(rx_buf + pos, &data, nbytes);
303 pos += nbytes;
304
305 regmap_write(rpc->regmap, RPC_SMADR,
306 rpc->addr + pos);
307 }
308 }
309 } else {
310 regmap_write(rpc->regmap, RPC_SMENR, rpc->smenr);
311 regmap_write(rpc->regmap, RPC_SMCR, rpc->smcr | RPC_SMCR_SPIE);
312 ret = wait_msg_xfer_end(rpc);
313 if (ret)
314 goto out;
315 }
316
317 return ret;
318
319 out:
320 return reset_control_reset(rpc->rstc);
321 }
322
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