Re: [PATCH v6 07/15] qcom: spmi-gpio: add support for hierarchical IRQ chip

From: Marc Zyngier
Date: Sun Jan 20 2019 - 06:32:41 EST


On Sat, 19 Jan 2019 20:42:44 +0000,
Brian Masney <masneyb@xxxxxxxxxxxxx> wrote:
>
> spmi-gpio did not have any irqchip support so consumers of this in
> device tree would need to call gpio[d]_to_irq() in order to get the
> proper IRQ on the underlying PMIC. IRQ chips in device tree should
> be usable from the start without the consumer having to make an
> additional call to get the proper IRQ on the parent. This patch adds
> hierarchical IRQ chip support to the spmi-gpio code to correct this
> issue.
>
> Driver was tested using the volume buttons (via gpio-keys) on the LG
> Nexus 5 (hammerhead) phone with the following two configurations.
>
> volume-up {
> interrupts-extended = <&pm8941_gpios 2 IRQ_TYPE_EDGE_BOTH>;
> ...
> };
>
> volume-up {
> gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
> ...
> };
>
> Both configurations now show that spmi-gpio is the IRQ domain and that
> the IRQ is setup in a hierarchy.
>
> $ grep volume_up /proc/interrupts
> 72: 6 0 spmi-gpio 1 Edge volume_up
>
> $ cat /sys/kernel/debug/irq/irqs/72
> handler: handle_edge_irq
> device: (null)
> status: 0x00000403
> _IRQ_NOPROBE
> istate: 0x00000000
> ddepth: 0
> wdepth: 0
> dstate: 0x02400203
> IRQ_TYPE_EDGE_RISING
> IRQ_TYPE_EDGE_FALLING
> IRQD_ACTIVATED
> IRQD_IRQ_STARTED
> node: 0
> affinity: 0-3
> effectiv:
> domain: :soc:spmi@fc4cf000:pm8941@0:gpios@c000
> hwirq: 0x1
> chip: spmi-gpio
> flags: 0x4
> IRQCHIP_MASK_ON_SUSPEND
> parent:
> domain: :soc:spmi@fc4cf000
> hwirq: 0xc100057
> chip: pmic_arb
> flags: 0x4
> IRQCHIP_MASK_ON_SUSPEND
>
> Signed-off-by: Brian Masney <masneyb@xxxxxxxxxxxxx>
> Reviewed-by: Stephen Boyd <sboyd@xxxxxxxxxx>
> ---
> Changes since v5:
> - Change IRQ_TYPE_NONE to IRQ_TYPE_EDGE_RISING
>
> Changes since v4:
> - None
>
> Changes since v3:
> - None
>
> Changes since v2:
> - Use PMIC_GPIO_PHYSICAL_OFFSET instead of the 1 constant
> - Use gpiochip_irq_domain_{activate,deactivate}
> - Changed 'fwspec->param[0] + 0xc0 - 1' to 'hwirq + c0' in call to
> irq_domain_alloc_irqs_parent
>
> Changes since v1:
> - Use two cells for interrupts instead of four.
> - Pin numbers in interrupts-extended are now one based instead of zero
> based so that they match the GPIO pin number.
> - Drop unnecessary parenthesis in pmic_gpio_domain_translate
> - Add missing of_node_put()
> - Remove irq field from pmic_gpio_pad struct that is no longer
> necessary.
>
> drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 115 +++++++++++++++++++++--
> 1 file changed, 105 insertions(+), 10 deletions(-)

Reviewed-by: Marc Zyngier <marc.zyngier@xxxxxxx>

Thanks,

M.

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