Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support

[Evan Green]

On Mon, Jan 21, 2019 at 10:34 PM Alok Chauhan <alokc@xxxxxxxxxxxxxx> wrote:
>
> Get the interconnect paths for SPI based Serial Engine device
> and vote accordingly based on maximum supported SPI frequency.
>
> Signed-off-by: Alok Chauhan <alokc@xxxxxxxxxxxxxx>
> ---
>  drivers/spi/spi-geni-qcom.c | 20 +++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
> index fdb7cb88..7bbbe9d 100644
> --- a/drivers/spi/spi-geni-qcom.c
> +++ b/drivers/spi/spi-geni-qcom.c
> @@ -12,6 +12,7 @@
>  #include <linux/qcom-geni-se.h>
>  #include <linux/spi/spi.h>
>  #include <linux/spinlock.h>
> +#include <linux/interconnect.h>

Sorted includes please, as mentioned by others.

>
>  /* SPI SE specific registers and respective register fields */
>  #define SE_SPI_CPHA            0x224
> @@ -589,6 +590,15 @@ static int spi_geni_probe(struct platform_device *pdev)
>         spin_lock_init(&mas->lock);
>         pm_runtime_enable(&pdev->dev);
>
> +       /* Set the bus quota to a reasonable value */
> +       mas->se.avg_bw = Bps_to_icc(2500);
> +       mas->se.peak_bw = Bps_to_icc(200000000);

Like the i2c case, can we compute real value based on clock speed?