Re: [PATCH 4/4] irq: imx: irqsteer: add multi output interrupts support

[Lucas Stach]

Hi,

Am Dienstag, den 22.01.2019, 13:17 +0000 schrieb Aisheng Dong:
> > > > From: Lucas Stach [mailto:l.stach@xxxxxxxxxxxxxx]
> > Sent: Tuesday, January 22, 2019 8:52 PM
> > > > To: Aisheng Dong <aisheng.dong@xxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx
> > > > > > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; shawnguo@xxxxxxxxxx; dl-linux-imx
> > > > > > > > <linux-imx@xxxxxxx>; robh+dt@xxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx;
> > > > tglx@xxxxxxxxxxxxx; Marc Zyngier <marc.zyngier@xxxxxxx>
> > Subject: Re: [PATCH 4/4] irq: imx: irqsteer: add multi output interrupts support
> > 
> > Am Dienstag, den 22.01.2019, 12:03 +0000 schrieb Aisheng Dong:
> > > > > > From: Lucas Stach [mailto:l.stach@xxxxxxxxxxxxxx]
> > > > 
> > > > Sent: Tuesday, January 22, 2019 6:59 PM
> > > > 
> > > > Am Dienstag, den 22.01.2019, 10:39 +0000 schrieb Aisheng Dong:
> > > > > > > > From: Lucas Stach [mailto:l.stach@xxxxxxxxxxxxxx]
> > > > > > 
> > > > > > Sent: Friday, January 18, 2019 6:23 PM
> > > > > 
> > > > > [...]
> > > > > > > > This has been discussed when upstreaming the driver. The
> > > > > > > > controller may support multiple output IRQs, but only one
> > > > > > > > them is actually used depending on the CHANCTRL config.
> > > > > > > > There is no use in hooking up all the output IRQs in DT, if
> > > > > > > > only one of them is actually used. Some of the outputs may
> > > > > > > > not even be visible to the Linux system, but may belong to a
> > > > > > > > Cortex M4 subsystem. All of those configurations can be
> > > > > > > > described in DT by changing the upstream interrupt and
> > > > > > > > "fsl,channel" in a
> > > > > > 
> > > > > > coherent way.
> > > > > > > > 
> > > > > > > > Please correct me if my understanding is totally wrong.
> > > > > > > 
> > > > > > > I'm afraid your understanding of CHAN seems wrong.
> > > > > > > (Binding doc of that property needs change as well).
> > > > > > > 
> > > > > > > On QXP DC SS, the IRQSTEER supports 512 interrupts with 8
> > > > > > > interrupt output Conntected to GIC.
> > > > > > > The current driver does not support it as it assumes only one
> > > > > > > interrupt
> > > > > > 
> > > > > > output used.
> > > > > > 
> > > > > > Okay, so let's take a step back. The description in the QXP RM
> > > > > > is actually better than what I've seen until now. Still it's
> > > > > > totally confusing that
> > > > 
> > > > the "channel"
> > > > > > terminology used with different meanings in docs. Let's try to
> > > > > > avoid this as much as possible.
> > > > > > 
> > > > > > So to get things straight: Each irqsteer controller has a number
> > > > > > of IRQ
> > > > 
> > > > groups.
> > > > > > All the input IRQs of one group are ORed together to form on output
> > 
> > IRQ.
> > > > > > Depending on the SoC integration, a group can contain 32 or
> > > > > > 64 IRQs, where DCSS irqsteer on MX8M and the big 512 input
> > > > > > controllers on QXP and QM both use 64 IRQs per group. You are
> > > > > > claiming that the smaller controllers on both QXP am QM have
> > > > > > only 32
> > > > 
> > > > IRQs per group, right?
> > > > > > 
> > > > > > So the only change that is needed is that the driver needs to
> > > > > > know the number of input IRQs per group, with a default of 64 to
> > > > > > not break DT
> > > > 
> > > > compatibility.
> > > > > > 
> > > > > 
> > > > > Not exactly.
> > > > > from HW point of view , there're two parameters during IRQSTEER
> > > > 
> > > > integration.
> > > > > For example,
> > > > > DC in QXP:
> > > > > > > > > > > > > > > > > parameterÂÂIRQCHAN		=ÂÂ1;
> > 
> > 	//Number of IRQ Channels/Slots
> > > > > > > parameterÂÂNINT32		=ÂÂ8;	//Number of interrupts in
> > 
> > multiple
> > > > 
> > > > of 32
> > > > 
> > > > If this is always in multiples of 32, the only change we need to
> > > > make to the driver is to fix DT binding and interpretation of the
> > > > "fsl,irq-groups" property to be in multiples of 32.
> > > > 
> > > > This means i.MX8MQ DCSS irqsteer would need to change to 2
> > > > irq-groups, but as this isn't used upstream yet we can still do this
> > > > change without breaking too much stuff and I would rather correct
> > > > this now than keeping a DT binding around that doesn't match the HW.
> > > > 
> > > 
> > > We want to avoid using of irq-groups as it's wrong.
> > > Stick to HW parameters, only channel number and interrupts number should
> > 
> > be used.
> > 
> > The fsl,irq-groups property is exactly your NINT32 parameter above. I just
> > wrongly assumed that it's always in multiples of 64, as that's what the
> > i.MX8MQ DCSS irqsteer module looks like. We should fix this and be done with
> > it.
> > 
> 
> No, not exactly the same thing. Using group will confuse people that the group is 32.
> However, internally Group is fixed 64 interrupts although it may not use all the
> 64 interrupts. E.g. 32 interrupts.
> See CHn_MINTDIS register which is also defined fixed to 64.
> 
> The two HW parameter for integration is already very clear. We should use interrupts
> Number for the channel. Not group.Â

Okay, I see that the name irq-groups is confusing for you. But then I
find the -per-chan naming confusing.

So given that we seem to agree to split each channel into it's own DT
node, there is no need to name the property "something-per-chan", as
it's implied by the split DT nodes that all properties in one node are
referencing a channel.

May I suggest to name the property "fsl,num-irqs"?

Regards,
Lucas