Re: [PATCH] mtd: rawnand: denali_dt: remove single anonymous clock support

[Miquel Raynal]

Hi Dinh,

Boris Brezillon <bbrezillon@xxxxxxxxxx> wrote on Thu, 31 Jan 2019
18:26:44 +0100:

> Hi Dinh,
> 
> On Thu, 31 Jan 2019 11:24:16 -0600
> Dinh Nguyen <dinguyen@xxxxxxxxxx> wrote:
> 
> > On 1/28/19 4:20 AM, Miquel Raynal wrote:  
> > > Hi Dinh,
> > > 
> > > Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx> wrote on Wed, 16 Jan
> > > 2019 10:27:11 +0900:
> > >     
> > >> (+CC Dinh Nguyen)
> > >>
> > >> On Tue, Jan 15, 2019 at 5:22 PM Miquel Raynal <miquel.raynal@xxxxxxxxxxx> wrote:    
> > >>>
> > >>> Hi Masahiro,
> > >>>
> > >>> Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx> wrote on Tue, 15 Jan
> > >>> 2019 17:11:34 +0900:
> > >>>      
> > >>>> Commit 6f1fe97bec34 ("mtd: rawnand: denali_dt: add more clocks based
> > >>>> on IP datasheet") introduced a more correct binding that requires
> > >>>> three named clocks.
> > >>>>
> > >>>> Now that all upstream DT files migrated over to it, remove the single
> > >>>> anonymous clock support.      
> > >>>
> > >>> I would love to do that but I think this is against the "DT backward
> > >>> compatibility rule".      
> > >>
> > >> Yeah, I know this rule, but we break DT binding from time to time.
> > >>
> > >>
> > >>    
> > >>> Anyway, IIRC it is accepted that this kind of
> > >>> rule might be broken if decided per the arch-maintainer (in this
> > >>> case, you I suppose). So if this is really what you want, I'll queue
> > >>> it.      
> > >>
> > >> My platform is fine, but this driver is used by SOCFPGA boards as well.
> > >>
> > >> I CCed the SOCFPGA maintainer, Dinh Nguyen.
> > >>    
> > > 
> > > Gentle ping on this topic.
> > >     
> > 
> > This patch looks fine to be. Feel free to add:
> > 
> > Tested-by: Dinh Nguyen <dinguyen@xxxxxxxxxx>  
> 
> I think Miquel is waiting for an Acked-by to confirm that you're okay
> breaking backward compat with old DT.

Yes, I am waiting for your Acked-by.


Thanks,
MiquÃl