[PATCH 0/9] ARM: sun9i: a80: Enable GMAC

[Chen-Yu Tsai]

Hi everyone,

On the Allwinner A80, the PIO pin controller includes configuration
registers to set the I/O voltage. These must match the actual voltage
provided externally. A mismatch results in signals not being passed
through.

With the new PIO pin-bank regulator supply support in place, we can
tack on support for setting up these registers.

This in turn allows us to enable the GMAC, which runs at a reduced
2.5V for RGMII, instead of the standard 3.0V or 3.3V.

Please have a look.


Regards
ChenYu


Chen-Yu Tsai (9):
  pinctrl: sunxi: Support I/O bias voltage setting on A80
  ARM: dts: sun9i: a80-optimus: Add node for AXP809's unused dc1sw
    regulator
  ARM: dts: sun9i: a80-optimus: Add GPIO pin-bank regulator supplies
  ARM: dts: sun9i: cubieboard4: Add GPIO pin-bank regulator supplies
  ARM: dts: sun9i: Add GMAC clock node
  ARM: dts: sun9i: Add A80 GMAC gigabit ethernet controller node
  ARM: dts: sun9i: Add A80 GMAC RGMII pinmux setting
  ARM: dts: sun9i: a80-optimus: Enable GMAC
  ARM: dts: sun9i: cubieboard4: Enable GMAC

 arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 44 +++++++++++++-
 arch/arm/boot/dts/sun9i-a80-optimus.dts     | 44 +++++++++++++-
 arch/arm/boot/dts/sun9i-a80.dtsi            | 65 +++++++++++++++++++++
 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c   |  1 +
 drivers/pinctrl/sunxi/pinctrl-sunxi.c       | 41 +++++++++++++
 drivers/pinctrl/sunxi/pinctrl-sunxi.h       | 12 ++++
 7 files changed, 202 insertions(+), 6 deletions(-)

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2.20.1