Re: [GIT PULL] x86/mm changes for v4.21

From: Dave Hansen
Date: Wed Feb 06 2019 - 19:33:57 EST


On 2/6/19 4:17 PM, Luck, Tony wrote:
> [ 93.491692] RAX: 0000000000000000 RBX: 0000000000000000 RCX: ffff99623f2c3f70
> [ 93.499658] RDX: 2e6b58da00000121 RSI: 0000000000000000 RDI: 7fff9981feeab000
...
> Potentially the problem might be a non-canonical address passed down
> by the machine check recovery code to switch the page with the error
> to uncacheable. Perhaps the refactored code is now using that in the
>
> invpcid (%rcx),%rax
>
> instruction that gets the #GP fault?

That looks probable. RDI even has the non-canonical address still in it
(RCX is pointing to the stack, btw).

I think there's an option to dump the trace buffers at panic time. You
might want to enable the TLB flush tracing:

/sys/kernel/debug/tracing/events/tlb/tlb_flush

and see if we get a suspect flush captured just before the #GP.

I wonder if the patches that you bisected to just changed the flushing
from being CR3-based (and not taking an address) to being INVPCID-based,
and taking an address that is sensitive to canonicality.