Re: [PATCH v10 12/25] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking
From: Julien Thierry
Date: Fri Feb 08 2019 - 04:36:58 EST
Hi Nathan,
On 08/02/2019 04:35, Nathan Chancellor wrote:
> On Thu, Jan 31, 2019 at 02:58:50PM +0000, Julien Thierry wrote:
[...]
>
> Hi Julien,
>
> This patch introduced a slew of Clang warnings:
>
> In file included from arch/arm64/kernel/signal.c:21:
> In file included from include/linux/compat.h:10:
> In file included from include/linux/time.h:6:
> In file included from include/linux/seqlock.h:36:
> In file included from include/linux/spinlock.h:54:
> In file included from include/linux/irqflags.h:16:
> arch/arm64/include/asm/irqflags.h:50:10: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
> : "r" (GIC_PRIO_IRQON)
> ^
> arch/arm64/include/asm/ptrace.h:39:25: note: expanded from macro 'GIC_PRIO_IRQON'
> #define GIC_PRIO_IRQON 0xf0
> ^
> arch/arm64/include/asm/irqflags.h:46:44: note: use constraint modifier "w"
> "msr_s " __stringify(SYS_ICC_PMR_EL1) ",%0\n"
> ^~
> %w0
I'm not sure I get the relevance of this kind of warnings from Clang.
Had it been an output operand I could understand the concern of having a
variable too small to store the register value. But here it's an input
operand being place in a wider register...
> arch/arm64/include/asm/alternative.h:286:29: note: expanded from macro 'ALTERNATIVE'
> _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
> ^
> arch/arm64/include/asm/alternative.h:88:30: note: expanded from macro '_ALTERNATIVE_CFG'
> __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0)
> ^
> arch/arm64/include/asm/alternative.h:76:2: note: expanded from macro '__ALTERNATIVE_CFG'
> newinstr "\n" \
> ^
> In file included from arch/arm64/kernel/signal.c:21:
> In file included from include/linux/compat.h:10:
> In file included from include/linux/time.h:6:
> In file included from include/linux/seqlock.h:36:
> In file included from include/linux/spinlock.h:54:
> In file included from include/linux/irqflags.h:16:
> arch/arm64/include/asm/irqflags.h:61:10: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
> : "r" (GIC_PRIO_IRQOFF)
> ^
> arch/arm64/include/asm/ptrace.h:40:26: note: expanded from macro 'GIC_PRIO_IRQOFF'
> #define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80)
> ^
> arch/arm64/include/asm/irqflags.h:58:45: note: use constraint modifier "w"
> "msr_s " __stringify(SYS_ICC_PMR_EL1) ", %0",
> ^
> arch/arm64/include/asm/irqflags.h:94:10: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
> : "r" (GIC_PRIO_IRQOFF)
> ^
> arch/arm64/include/asm/ptrace.h:40:26: note: expanded from macro 'GIC_PRIO_IRQOFF'
> #define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80)
> ^
> arch/arm64/include/asm/irqflags.h:91:18: note: use constraint modifier "w"
> "csel %0, %0, %2, eq",
> ^~
> %w2
> arch/arm64/include/asm/alternative.h:286:29: note: expanded from macro 'ALTERNATIVE'
> _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
> ^
> arch/arm64/include/asm/alternative.h:88:30: note: expanded from macro '_ALTERNATIVE_CFG'
> __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0)
> ^
> arch/arm64/include/asm/alternative.h:76:2: note: expanded from macro '__ALTERNATIVE_CFG'
> newinstr "\n" \
> ^
> 3 warnings generated.
>
>
> I am not sure if they should be fixed with Clang's suggestion of a
> constraint modifier or a cast like commit 1b57ec8c7527 ("arm64: io:
> Ensure value passed to __iormb() is held in a 64-bit register"), hence
> this message.
>
Clang's suggestion would not work as MSR instructions do not operate on
32-bit general purpose registers. Seeing that PMR is a 32-bit register,
I'd avoid adding UL for the GIC_PRIO_IRQ* constants.
So I'd recommend just casting the the asm inline operands to unsigned
long. This should only affect the 3 locations
arch/arm64/include/asm/irqflags.h.
Does the following patch work for you?
Thanks,
--
Julien Thierry
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