[PATCH 4.20 009/352] drm/sun4i: Initialize registers in tcon-top driver
From: Greg Kroah-Hartman
Date: Mon Feb 11 2019 - 11:14:48 EST
4.20-stable review patch. If anyone has any objections, please let me know.
[ Upstream commit c96d62215fb540e2ae61de44cb7caf4db50958e3 ]
It turns out that TCON TOP registers in H6 SoC have non-zero reset
value. This may cause issues if bits are not changed during
To prevent that, initialize registers to 0.
Signed-off-by: Jernej Skrabec <jernej.skrabec@xxxxxxxx>
Signed-off-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 3040a79f298f..37158548b447 100644
@@ -167,6 +167,13 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
+ * At least on H6, some registers have some bits set by default
+ * which may cause issues. Clear them here.
+ writel(0, regs + TCON_TOP_PORT_SEL_REG);
+ writel(0, regs + TCON_TOP_GATE_SRC_REG);
* TCON TOP has two muxes, which select parent clock for each TCON TV
* channel clock. Parent could be either TCON TV or TVE clock. For now